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author | Ralph Kondziella <rk@argos-messtechnik.de> | 2009-01-26 12:34:36 -0700 |
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committer | John Rigby <jrigby@freescale.com> | 2009-02-03 15:40:29 -0700 |
commit | 70a4da45e16b72e8e5b0baaecdaee9be8619647d (patch) | |
tree | 7801efb95297a664c6ee2fac3839e5d5df5a9a0a /include/configs/ads5121.h | |
parent | abfbd0ae4967df18102345db4f4b529a13da107b (diff) | |
download | u-boot-imx-70a4da45e16b72e8e5b0baaecdaee9be8619647d.zip u-boot-imx-70a4da45e16b72e8e5b0baaecdaee9be8619647d.tar.gz u-boot-imx-70a4da45e16b72e8e5b0baaecdaee9be8619647d.tar.bz2 |
ADS5121 Add PATA support
Original patch from Ralph Kondziella
plus clean up by Wolfgang Denk
plus changes by John Rigby
use ips clock not lpc
port forward to current u-boot release
Signed-off-by: Ralph Kondziella <rk@argos-messtechnik.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: John Rigby <jrigby@freescale.com>
Diffstat (limited to 'include/configs/ads5121.h')
-rw-r--r-- | include/configs/ads5121.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index 0aca4a5..8fda3f2 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -355,11 +355,19 @@ #define CONFIG_CMD_EEPROM #define CONFIG_CMD_DATE #undef CONFIG_CMD_FUSE +#define CONFIG_CMD_IDE +#define CONFIG_CMD_EXT2 #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI #endif +#if defined(CONFIG_CMD_IDE) +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION +#define CONFIG_ISO_PARTITION +#endif /* defined(CONFIG_CMD_IDE) */ + /* * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock. * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE is set @@ -496,4 +504,48 @@ #define OF_TBCLK (bd->bi_busfreq / 4) #define OF_STDOUT_PATH "/soc@80000000/serial@11300" +/*----------------------------------------------------------------------- + * IDE/ATA stuff + *----------------------------------------------------------------------- + */ + +#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ +#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ +#undef CONFIG_IDE_LED /* LED for IDE not supported */ + +#define CONFIG_IDE_RESET /* reset for IDE supported */ +#define CONFIG_IDE_PREINIT + +#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 1 drive per IDE bus */ + +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 +#define CONFIG_SYS_ATA_BASE_ADDR MPC512X_PATA + +/* Offset for data I/O RefMan MPC5121EE Table 28-10 */ +#define CONFIG_SYS_ATA_DATA_OFFSET (0x00A0) + +/* Offset for normal register accesses */ +#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) + +/* Offset for alternate registers RefMan MPC5121EE Table 28-23 */ +#define CONFIG_SYS_ATA_ALT_OFFSET (0x00D8) + +/* Interval between registers */ +#define CONFIG_SYS_ATA_STRIDE 4 + +#define ATA_BASE_ADDR MPC512X_PATA + +/* + * Control register bit definitions + */ +#define FSL_ATA_CTRL_FIFO_RST_B 0x80000000 +#define FSL_ATA_CTRL_ATA_RST_B 0x40000000 +#define FSL_ATA_CTRL_FIFO_TX_EN 0x20000000 +#define FSL_ATA_CTRL_FIFO_RCV_EN 0x10000000 +#define FSL_ATA_CTRL_DMA_PENDING 0x08000000 +#define FSL_ATA_CTRL_DMA_ULTRA 0x04000000 +#define FSL_ATA_CTRL_DMA_WRITE 0x02000000 +#define FSL_ATA_CTRL_IORDY_EN 0x01000000 + #endif /* __CONFIG_H */ |