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authorMichael Schwingen <michael@schwingen.org>2011-05-23 00:00:04 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-06-23 08:25:18 +0200
commit517c5dfed5107fe1d77dd1e003c3c076bcf279e6 (patch)
tree192c7cde88075c57dd150af93d30f24bfcbeffea /include/configs/actux1.h
parent66463e60dff59716eb323cc1e219189c0fd8671c (diff)
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update/fix AcTux1 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Diffstat (limited to 'include/configs/actux1.h')
-rw-r--r--include/configs/actux1.h62
1 files changed, 36 insertions, 26 deletions
diff --git a/include/configs/actux1.h b/include/configs/actux1.h
index 8121b27..160c10a 100644
--- a/include/configs/actux1.h
+++ b/include/configs/actux1.h
@@ -26,13 +26,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-/* 1: modified board with 32MB DRAM */
-#define CONFIG_ACTUX1_32MB 0
-/* 1: 2*2MB FLASH (standard) */
-#define CONFIG_ACTUX1_FLASH2X2 1
-/* 1: 1*8MB FLASH (upgraded boards) */
-#define CONFIG_ACTUX1_FLASH1X8 0
-
#define CONFIG_IXP425 1
#define CONFIG_ACTUX1 1
@@ -44,12 +37,12 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_BOARD_EARLY_INIT_F 1
+#define CONFIG_SYS_LDSCRIPT "board/actux1/u-boot.lds"
/***************************************************************
* U-boot generic defines start here.
***************************************************************/
-#undef CONFIG_USE_IRQ
-
/*
* Size of malloc() pool
*/
@@ -62,8 +55,13 @@
#include <config_cmd_default.h>
#define CONFIG_CMD_ELF
-#undef CONFIG_CMD_PCI
-#undef CONFIG_PCI
+#ifdef CONFIG_PCI
+#define CONFIG_CMD_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_IXP_PCI
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_CMD_PCI_ENUM
+#endif
#define CONFIG_BOOTCOMMAND "run boot_flash"
/* enable passing of ATAGs */
@@ -93,8 +91,9 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000
#define CONFIG_SYS_MEMTEST_END 0x00800000
-/* spec says 66.666 MHz, but it appears to be 33 */
-#define CONFIG_SYS_HZ 3333333
+/* timer clock - 2* OSC_IN system clock */
+#define CONFIG_IXP425_TIMER_CLK 66666666
+#define CONFIG_SYS_HZ 1000
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
@@ -109,10 +108,6 @@
* The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
-#endif
/* Expansion bus settings */
#define CONFIG_SYS_EXP_CS0 0xbd113842
@@ -120,9 +115,9 @@
/* SDRAM settings */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x00000000
-#define CONFIG_SYS_DRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#if CONFIG_ACTUX1_32MB
+#ifdef CONFIG_RAM_32MB
# define CONFIG_SYS_SDR_CONFIG 0x18
# define PHYS_SDRAM_1_SIZE 0x02000000
# define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
@@ -136,8 +131,11 @@
# define CONFIG_SYS_DRAM_SIZE 0x01000000
#endif
+
+
/* FLASH organization */
-#if CONFIG_ACTUX1_FLASH2X2
+#define CONFIG_SYS_TEXT_BASE 0x50000000
+#ifdef CONFIG_FLASH2X2
# define CONFIG_SYS_MAX_FLASH_BANKS 2
/* max number of sectors on one chip */
# define CONFIG_SYS_MAX_FLASH_SECT 40
@@ -145,7 +143,7 @@
# define PHYS_FLASH_2 0x50200000
# define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
#endif
-#if CONFIG_ACTUX1_FLASH1X8
+#ifdef CONFIG_FLASH1X8
# define CONFIG_SYS_MAX_FLASH_BANKS 1
/* max number of sectors on one chip */
# define CONFIG_SYS_MAX_FLASH_SECT 140
@@ -156,6 +154,7 @@
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
+#define CONFIG_BOARD_SIZE_LIMIT 262144
/* Use common CFI driver */
#define CONFIG_SYS_FLASH_CFI
@@ -172,12 +171,16 @@
#define CONFIG_NET_MULTI 1
/* NPE0 PHY address */
#define CONFIG_PHY_ADDR 0
+/* NPE1 PHY address (HW Release E only) */
+#define CONFIG_PHY1_ADDR 1
/* MII PHY management */
#define CONFIG_MII 1
/* Number of ethernet rx buffers & descriptors */
#define CONFIG_SYS_RX_ETH_BUFFER 16
#define CONFIG_RESET_PHY_R 1
+#define CONFIG_HAS_ETH1 1
+
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
@@ -202,17 +205,19 @@
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
#define CONFIG_SYS_USE_PPCENV 1
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CONFIG_EXTRA_ENV_SETTINGS \
"npe_ucode=50040000\0" \
"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
"kerneladdr=50050000\0" \
+ "kernelfile=actux1/uImage\0" \
+ "rootfile=actux1/rootfs\0" \
"rootaddr=50170000\0" \
"loadaddr=10000\0" \
"updateboot_ser=mw.b 10000 ff 40000;" \
" loady ${loadaddr};" \
" run eraseboot writeboot\0" \
"updateboot_net=mw.b 10000 ff 40000;" \
- " tftp ${loadaddr} u-boot.bin;" \
+ " tftp ${loadaddr} actux1/u-boot.bin;" \
" run eraseboot writeboot\0" \
"eraseboot=protect off 50000000 50003fff;" \
" protect off 50006000 5003ffff;" \
@@ -220,8 +225,9 @@
" erase 50006000 5003ffff\0" \
"writeboot=cp.b 10000 50000000 4000;" \
" cp.b 16000 50006000 3a000\0" \
- "eraseenv=protect off 50004000 50005fff;" \
- " erase 50004000 50005fff\0" \
+ "updateucode=loady;" \
+ " era ${npe_ucode} +${filesize};" \
+ " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
"updateroot=tftp ${loadaddr} ${rootfile};" \
" era ${rootaddr} +${filesize};" \
" cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
@@ -232,7 +238,7 @@
" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
- "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
"boot_flash=run flashargs addtty addeth;" \
" bootm ${kerneladdr}\0" \
@@ -240,4 +246,8 @@
" tftpboot ${loadaddr} ${kernelfile};" \
" bootm\0"
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
#endif /* __CONFIG_H */