diff options
| author | Jon Loeliger <jdl@freescale.com> | 2007-07-08 15:31:57 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2007-07-08 16:05:43 -0500 |
| commit | a5562901661bd428f7e5feb333f796372cb81019 (patch) | |
| tree | 830226f1bc8e6b223100d11c999a9d20b6acc5fe /include/configs/WUH405.h | |
| parent | fe7f782d5b8c64a0195c68c31a0a11d4f641355e (diff) | |
| download | u-boot-imx-a5562901661bd428f7e5feb333f796372cb81019.zip u-boot-imx-a5562901661bd428f7e5feb333f796372cb81019.tar.gz u-boot-imx-a5562901661bd428f7e5feb333f796372cb81019.tar.bz2 | |
include/configs: Use new CONFIG_CMD_* in various [TUVWZYZ]* named board config files.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'include/configs/WUH405.h')
| -rw-r--r-- | include/configs/WUH405.h | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index faf855d..f786520 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -60,19 +60,22 @@ #define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ -#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_DHCP | \ - CFG_CMD_IRQ | \ - CFG_CMD_ELF | \ - CFG_CMD_NAND | \ - CFG_CMD_DATE | \ - CFG_CMD_I2C | \ - CFG_CMD_MII | \ - CFG_CMD_PING | \ - CFG_CMD_EEPROM ) - -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include <cmd_confdefs.h> + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_ELF +#define CONFIG_CMD_NAND +#define CONFIG_CMD_DATE +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_EEPROM + #undef CONFIG_WATCHDOG /* watchdog disabled */ @@ -92,7 +95,7 @@ #define CFG_PROMPT_HUSH_PS2 "> " #endif -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ @@ -270,7 +273,7 @@ #define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */ /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif |