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authorwdenk <wdenk>2004-02-06 21:48:22 +0000
committerwdenk <wdenk>2004-02-06 21:48:22 +0000
commita6cccaea5a4743f4e4fb93a3ae9537e7357c783b (patch)
tree7e4ef47208c164f62c6384e8f76afc073cc14145 /include/configs/TQM866M.h
parent5e4be00fb037feb6476125d044b98e0e22b70d31 (diff)
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* Patch by Wolter Kamphuis, 15 Dec 2003:
made CONFIG_SILENT_CONSOLE usable on all architectures * Disable date command on TQM866M - there is no RTC on MPC866
Diffstat (limited to 'include/configs/TQM866M.h')
-rw-r--r--include/configs/TQM866M.h14
1 files changed, 4 insertions, 10 deletions
diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h
index f0181db..713cc40 100644
--- a/include/configs/TQM866M.h
+++ b/include/configs/TQM866M.h
@@ -130,15 +130,16 @@
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+#undef CONFIG_RTC_MPC8xx /* MPC866 does not support RTC */
+
+#define CONFIG_TIMESTAMP /* but print image timestmps */
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_ASKENV | \
CFG_CMD_DHCP | \
CFG_CMD_EEPROM | \
CFG_CMD_IDE | \
- CFG_CMD_I2C | \
- CFG_CMD_DATE )
+ CFG_CMD_I2C )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
@@ -276,12 +277,6 @@
#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
/*-----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register 11-27
- *-----------------------------------------------------------------------
- */
-#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
-
-/*-----------------------------------------------------------------------
* PISCR - Periodic Interrupt Status and Control 11-31
*-----------------------------------------------------------------------
* Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
@@ -403,7 +398,6 @@
#endif /* CONFIG_CAN_DRIVER */
/*
- *
* 4096 Rows from SDRAM example configuration
* 1000 factor s -> ms
* 64 PTP (pre-divider from MPTPR) from SDRAM example configuration