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| author | wdenk <wdenk> | 2004-01-29 09:22:58 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2004-01-29 09:22:58 +0000 |
| commit | 6876609446980c3055bbd32c195a63330e21d8e6 (patch) | |
| tree | b01a5dcb24de0cc0a020b142986eb64287f39422 /include/configs/TQM866M.h | |
| parent | c178d3da6f1ac765cd880530a0672540b415a01c (diff) | |
| download | u-boot-imx-6876609446980c3055bbd32c195a63330e21d8e6.zip u-boot-imx-6876609446980c3055bbd32c195a63330e21d8e6.tar.gz u-boot-imx-6876609446980c3055bbd32c195a63330e21d8e6.tar.bz2 | |
* Implement adaptive SDRAM timing configuration based on actual CPU
clock frequency for INCA-IP; fix problem with board hanging when
switching from 150MHz to 100MHz
* Add PCMCIA CS support for BMS2003 board
Diffstat (limited to 'include/configs/TQM866M.h')
| -rw-r--r-- | include/configs/TQM866M.h | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 31f6d73..a5a759f 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -36,16 +36,14 @@ #define CONFIG_MPC866 1 /* This is a MPC866 CPU */ #define CONFIG_TQM866M 1 /* ...on a TQM8xxM module */ -#define CFG_866_OSCCLK 10000000 /* 10 MHz - PLL input clock */ -#define CFG_866_CPUCLK_MIN 40000000 /* 40 MHz - CPU minimum clock */ +#define CFG_866_OSCCLK 10000000 /* 10 MHz - PLL input clock */ +#define CFG_866_CPUCLK_MIN 10000000 /* 10 MHz - CPU minimum clock */ #define CFG_866_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */ -#define CFG_866_CPUCLK_DEFAULT 100000000 /* 100 MHz - CPU default clock */ +#define CFG_866_CPUCLK_DEFAULT 50000000 /* 50 MHz - CPU default clock */ /* (it will be used if there is no */ /* 'cpuclk' variable with valid value) */ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ -#undef CONFIG_8xx_CONS_SMC2 -#undef CONFIG_8xx_CONS_NONE #define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */ |