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authorwdenk <wdenk>2004-01-02 14:00:00 +0000
committerwdenk <wdenk>2004-01-02 14:00:00 +0000
commitd4ca31c40e8888b36635967522ec7ea03fd7e70b (patch)
tree126385a917df4665532dc33cff5fee2977e8fc0e /include/configs/TQM855M.h
parentc18960049f8ea9b0a8ad0a05c93e23fbab025da0 (diff)
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* Cleanup lowboot code for MPC5200
* Minor code cleanup (coding style) * Patch by Reinhard Meyer, 30 Dec 2003: - cpu/mpc5xxx/fec.c: added CONFIG_PHY_ADDR, added CONFIG_PHY_TYPE, - added CONFIG_PHY_ADDR to include/configs/IceCube.h, - turned debug print of PHY registers into a function (called in two places) - added support for EMK MPC5200 based modules * Fix MPC8xx PLPRCR_MFD_SHIFT typo * Add support for TQM866M modules * Fixes for TQM855M with 4 MB flash (Am29DL163 = _no_ mirror bit flash) * Fix a few compiler warnings
Diffstat (limited to 'include/configs/TQM855M.h')
-rw-r--r--include/configs/TQM855M.h36
1 files changed, 35 insertions, 1 deletions
diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h
index e926d93..cb4a16a 100644
--- a/include/configs/TQM855M.h
+++ b/include/configs/TQM855M.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2003
+ * (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -83,6 +83,39 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
+/* enable I2C and select the hardware/software driver */
+#undef CONFIG_HARD_I2C /* I2C with hardware support */
+#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+
+#define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
+#define CFG_I2C_SLAVE 0xFE
+
+#ifdef CONFIG_SOFT_I2C
+/*
+ * Software (bit-bang) I2C driver configuration
+ */
+#define PB_SCL 0x00000020 /* PB 26 */
+#define PB_SDA 0x00000010 /* PB 27 */
+
+#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
+#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
+#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
+#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
+#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
+ else immr->im_cpm.cp_pbdat &= ~PB_SDA
+#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
+ else immr->im_cpm.cp_pbdat &= ~PB_SCL
+#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
+#endif /* CONFIG_SOFT_I2C */
+
+#define CFG_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
+#define CFG_I2C_EEPROM_ADDR_LEN 2 /* two byte address */
+#if 0
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* takes up to 10 msec */
+#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
+#define CFG_EEPROM_PAGE_WRITE_BITS 5
+#endif
+
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
#define CONFIG_MAC_PARTITION
@@ -93,6 +126,7 @@
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_ASKENV | \
CFG_CMD_DHCP | \
+ CFG_CMD_EEPROM | \
CFG_CMD_IDE | \
CFG_CMD_DATE )