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| author | Joe Hershberger <joe.hershberger@ni.com> | 2011-10-11 23:57:28 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:55 -0500 |
| commit | 72cd4087c9644812b0fff9440e88e986d259bf41 (patch) | |
| tree | 1eda3ef995273cca7b4cf11c978895fd8ac4f3f4 /include/configs/TQM834x.h | |
| parent | c7357a2b90aff93bbc3b8e71867b2e86eb0b73da (diff) | |
| download | u-boot-imx-72cd4087c9644812b0fff9440e88e986d259bf41.zip u-boot-imx-72cd4087c9644812b0fff9440e88e986d259bf41.tar.gz u-boot-imx-72cd4087c9644812b0fff9440e88e986d259bf41.tar.bz2 | |
mpc83xx: Cleanup usage of BAT constants
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/TQM834x.h')
| -rw-r--r-- | include/configs/TQM834x.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index a7f11d3..ae296eb 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -421,14 +421,14 @@ /* DDR 0 - 512M */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ | BATU_BL_256M \ | BATU_VS \ | BATU_VP) #define CONFIG_SYS_IBAT1L (CONFIG_SYS_SDRAM_BASE + 0x10000000 \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT1U (CONFIG_SYS_SDRAM_BASE + 0x10000000 \ | BATU_BL_256M \ @@ -437,7 +437,7 @@ /* stack in DCACHE @ 512M (no backing mem) */ #define CONFIG_SYS_IBAT2L (CONFIG_SYS_INIT_RAM_ADDR \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT2U (CONFIG_SYS_INIT_RAM_ADDR \ | BATU_BL_128K \ @@ -447,14 +447,14 @@ /* PCI */ #ifdef CONFIG_PCI #define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI1_MEM_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI1_MEM_BASE \ | BATU_BL_256M \ | BATU_VS \ | BATU_VP) #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_MMIO_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_MEMCOHERENCE \ | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI1_MMIO_BASE \ @@ -462,7 +462,7 @@ | BATU_VS \ | BATU_VP) #define CONFIG_SYS_IBAT5L (CONFIG_SYS_PCI1_IO_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_IO_BASE \ @@ -480,7 +480,7 @@ /* IMMRBAR */ #define CONFIG_SYS_IBAT6L (CONFIG_SYS_IMMR \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT6U (CONFIG_SYS_IMMR \ @@ -490,7 +490,7 @@ /* FLASH */ #define CONFIG_SYS_IBAT7L (CONFIG_SYS_FLASH_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT7U (CONFIG_SYS_FLASH_BASE \ |