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| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-11-27 16:13:00 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2006-11-27 16:13:00 +0100 |
| commit | d3c5e8b2f5945d93de8f23b053e9dcd033983245 (patch) | |
| tree | 72c292c41bc0dfadd6f634fe03e697d8a4473487 /include/configs/TQM834x.h | |
| parent | 98280e3d431db77d92219438b8840853bd7cb412 (diff) | |
| parent | a9398e018593782c5fa7d0741955fc1256b34c1e (diff) | |
| download | u-boot-imx-d3c5e8b2f5945d93de8f23b053e9dcd033983245.zip u-boot-imx-d3c5e8b2f5945d93de8f23b053e9dcd033983245.tar.gz u-boot-imx-d3c5e8b2f5945d93de8f23b053e9dcd033983245.tar.bz2 | |
Merge with /home/wd/git/u-boot/master
Diffstat (limited to 'include/configs/TQM834x.h')
| -rw-r--r-- | include/configs/TQM834x.h | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index cec7e3e..4bbee97 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -353,6 +353,12 @@ extern int tqm834x_num_flash_banks; #define CFG_LOAD_ADDR 0x2000000 /* default load address */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */ +#ifdef CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#endif + #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else @@ -422,9 +428,9 @@ extern int tqm834x_num_flash_banks; #define CFG_SICRL SICRL_LDP_A /* i-cache and d-cache disabled */ -#define CFG_HID0_INIT 0x000000000 -#define CFG_HID0_FINAL CFG_HID0_INIT -#define CFG_HID2 0x000000000 +#define CFG_HID0_INIT 0x000000000 +#define CFG_HID0_FINAL CFG_HID0_INIT +#define CFG_HID2 HID2_HBE /* DDR 0 - 512M */ #define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) @@ -437,12 +443,21 @@ extern int tqm834x_num_flash_banks; #define CFG_IBAT2U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP) /* PCI */ -#define CFG_IBAT3L (CFG_PCI1_MEM_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) +#ifdef CONFIG_PCI +#define CFG_IBAT3L (CFG_PCI1_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) #define CFG_IBAT3U (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) -#define CFG_IBAT4L (CFG_PCI1_MEM_BASE + 0x10000000 | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) +#define CFG_IBAT4L (CFG_PCI1_MEM_BASE + 0x10000000 | BATL_PP_10 | BATL_MEMCOHERENCE) #define CFG_IBAT4U (CFG_PCI1_MEM_BASE + 0x10000000 | BATU_BL_256M | BATU_VS | BATU_VP) #define CFG_IBAT5L (CFG_PCI1_IO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) #define CFG_IBAT5U (CFG_PCI1_IO_BASE + 0x10000000 | BATU_BL_16M | BATU_VS | BATU_VP) +#else +#define CFG_IBAT3L (0) +#define CFG_IBAT3U (0) +#define CFG_IBAT4L (0) +#define CFG_IBAT4U (0) +#define CFG_IBAT5L (0) +#define CFG_IBAT5U (0) +#endif /* IMMRBAR */ #define CFG_IBAT6L (CFG_IMMRBAR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) |