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author | Tom Rini <trini@ti.com> | 2014-12-16 15:20:02 -0500 |
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committer | Tom Rini <trini@ti.com> | 2014-12-16 15:20:02 -0500 |
commit | e3bf81b1e841ecabe7c8b3d48621256db8b8623e (patch) | |
tree | 5206fb056d00a7dc17eee3578ee7fd10bdbf9d5b /include/configs/T4240RDB.h | |
parent | 3bfbf32b6fe5e2d4605bc7ee99d1844b572662c2 (diff) | |
parent | 00233528559c913e4bfafb1505ebf65f78e02976 (diff) | |
download | u-boot-imx-e3bf81b1e841ecabe7c8b3d48621256db8b8623e.zip u-boot-imx-e3bf81b1e841ecabe7c8b3d48621256db8b8623e.tar.gz u-boot-imx-e3bf81b1e841ecabe7c8b3d48621256db8b8623e.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'include/configs/T4240RDB.h')
-rw-r--r-- | include/configs/T4240RDB.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index db03993..b644a6c 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -12,6 +12,8 @@ #define CONFIG_T4240RDB #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE4 @@ -577,10 +579,26 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull #define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE +#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ + CONFIG_SYS_BMAN_CENA_SIZE) +#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 #define CONFIG_SYS_QMAN_NUM_PORTALS 50 #define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 #define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull #define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 +#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 +#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE +#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ + CONFIG_SYS_QMAN_CENA_SIZE) +#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME |