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author | York Sun <yorksun@freescale.com> | 2012-10-11 07:13:37 +0000 |
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committer | Andy Fleming <afleming@freescale.com> | 2012-10-22 15:52:46 -0500 |
commit | ee52b188ca2c631427d197056ab7b71b9e23bde7 (patch) | |
tree | a463b381ca113a66680557d23092c939883ce2c5 /include/configs/T4240QDS.h | |
parent | 98ffa19053f2d10578a227de4e441698226fde0a (diff) | |
download | u-boot-imx-ee52b188ca2c631427d197056ab7b71b9e23bde7.zip u-boot-imx-ee52b188ca2c631427d197056ab7b71b9e23bde7.tar.gz u-boot-imx-ee52b188ca2c631427d197056ab7b71b9e23bde7.tar.bz2 |
powerpc/t4qds: Add T4QDS board
The T4240QDS is a high-performance computing evaluation, development and
test platform supporting the T4240 QorIQ Power Architecture™ processor.
SERDES Connections
32 lanes grouped into four 8-lane banks
Two “front side” banks dedicated to Ethernet
Two “back side” banks dedicated to other protocols
DDR Controllers
Three independant 64-bit DDR3 controllers
Supports rates up to 2133 MHz data-rate
Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller
QIXIS System Logic FPGA
Each DDR controller has two DIMM slots. The first slot of each controller
has up to 4 chip selects to support single-, dual- and quad-rank DIMMs.
The second slot has only 2 chip selects to support single- and dual-rank
DIMMs. At any given time, up to total 4 chip selects can be used.
Detail information can be found in doc/README.t4qds
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/T4240QDS.h')
-rw-r--r-- | include/configs/T4240QDS.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h new file mode 100644 index 0000000..76b3ca6 --- /dev/null +++ b/include/configs/T4240QDS.h @@ -0,0 +1,35 @@ +/* + * Copyright 2011-2012 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * T4240 QDS board configuration file + */ +#define CONFIG_T4240QDS +#define CONFIG_PHYS_64BIT +#define CONFIG_PPC_T4240 + +#define CONFIG_FSL_SATA_V2 +#define CONFIG_PCIE4 + +#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ + +#include "t4qds.h" |