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authorShaohui Xie <Shaohui.Xie@freescale.com>2014-06-26 14:41:33 +0800
committerYork Sun <yorksun@freescale.com>2014-07-22 16:25:55 -0700
commitde5191631088e71ba8ed28bb491dafa776058008 (patch)
treebb28ade660fc6f075ce3b191c8c996cd2526cb2f /include/configs/T4240QDS.h
parent9d0456822c4fec302608d4161ae9d9cfe81100b1 (diff)
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powerpc/ifc: fix invalid CSn FTIM2.TCH setting
On some platforms, CSn FTIM2.TCH is set to zero which is invalid, an invalid hold time makes DUT timing variances, whether it works or not on luck. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs/T4240QDS.h')
-rw-r--r--include/configs/T4240QDS.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index a770dd0..efdb68b 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -237,7 +237,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \
FTIM1_GPCM_TRAD(0x3f))
#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
- FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TCH(0x8) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS3_FTIM3 0x0