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| author | Tom Rini <trini@konsulko.com> | 2017-03-01 16:51:58 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-03-09 11:37:24 -0500 |
| commit | 285226785ee178c0bbe8a67185c21e461cf4bc9f (patch) | |
| tree | 6616483a4fb2d0f900a37bce1f2d4c43d4776285 /include/configs/T104xRDB.h | |
| parent | 8f42a2b64738394150a3249307f9fec62821e8db (diff) | |
| download | u-boot-imx-285226785ee178c0bbe8a67185c21e461cf4bc9f.zip u-boot-imx-285226785ee178c0bbe8a67185c21e461cf4bc9f.tar.gz u-boot-imx-285226785ee178c0bbe8a67185c21e461cf4bc9f.tar.bz2 | |
Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs
In some cases this is absolutely required, so select this for some secure
features. This also requires migration of RSA_FREESCALE_EXP
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Saksham Jain <saksham.jain@nxp.freescale.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/T104xRDB.h')
| -rw-r--r-- | include/configs/T104xRDB.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index b3e9c28..bd1cfd4 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -161,7 +161,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ |