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authorPriyanka Jain <Priyanka.Jain@freescale.com>2014-02-26 09:38:37 +0530
committerYork Sun <yorksun@freescale.com>2014-03-07 14:53:48 -0800
commit96ac18c9ccc77c7f57dff5651b34a3cc914c8abd (patch)
tree325af069503d735a07491ded13d2f37608ca4ebc /include/configs/T1040RDB.h
parent337b0c52b3296f371d04aef71a833e09110e0e6b (diff)
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powerpc/t104xrdb: Update DDR initialization related settings
Update following DDR related settings for T1040RDB, T1042RDB_PI -Correct number of chip selects to two as t1040 supports two Chip selects. -Update board_specific_parameters udimm structure with settings derived via calibration. -Update ddr_raw_timing sructure corresponding to DIMM. -Set ODT to off. Typically on FSL board, ODT is set to 75 ohm, but on T104xRDB, on setting this , DDR instability is observed. Board-level debugging is in progress. Verified the updated settings to be working fine with dual-ranked Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs/T1040RDB.h')
-rw-r--r--include/configs/T1040RDB.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h
index fd010c0..395845b 100644
--- a/include/configs/T1040RDB.h
+++ b/include/configs/T1040RDB.h
@@ -147,7 +147,7 @@
/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
-#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
+#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_DDR_RAW_TIMING