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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /include/configs/SX1.h
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
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rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/SX1.h')
-rw-r--r--include/configs/SX1.h72
1 files changed, 36 insertions, 36 deletions
diff --git a/include/configs/SX1.h b/include/configs/SX1.h
index ff4e1a0..fd1a3bd 100644
--- a/include/configs/SX1.h
+++ b/include/configs/SX1.h
@@ -46,8 +46,8 @@
/*
* Size of malloc() pool
*/
-#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
* Hardware drivers
@@ -56,11 +56,11 @@
/*
* NS16550 Configuration
*/
-#define CFG_NS16550
-#define CFG_NS16550_SERIAL
-#define CFG_NS16550_REG_SIZE (-4)
-#define CFG_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
-#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
+#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
/*
* select serial console configuration
@@ -82,8 +82,8 @@
* I2C configuration
*/
#define CONFIG_HARD_I2C
-#define CFG_I2C_SPEED 100000
-#define CFG_I2C_SLAVE 1
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP1510_I2C
#define CONFIG_ENV_OVERWRITE
@@ -91,7 +91,7 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
-#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*
@@ -121,26 +121,26 @@
/*
* Miscellaneous configurable options
*/
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "SX1# " /* Monitor Command Prompt */
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "SX1# " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
-#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-#define CFG_LOAD_ADDR 0x10000000 /* default load address */
+#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
* This time is further subdivided by a local divisor.
*/
-#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
+#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
/*-----------------------------------------------------------------------
* Stack sizes
@@ -163,36 +163,36 @@
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
-#define CFG_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
#define PHYS_FLASH_SIZE (16 << 10) /* 16 MB */
#define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */
-#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
-#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */
-#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
-#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
-#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE }
+#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
+#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE }
/*-----------------------------------------------------------------------
* FLASH driver setup
*/
-#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
+#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
-#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
-#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
/* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
+#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
+#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */
-#define CONFIG_ENV_OFFSET ( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */
+#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */
/* Address and size of Redundant Environment Sector */
#define CONFIG_ENV_SIZE_REDUND 0x20000