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author | wdenk <wdenk> | 2005-01-09 23:33:49 +0000 |
---|---|---|
committer | wdenk <wdenk> | 2005-01-09 23:33:49 +0000 |
commit | 6225c5db6cb5a727cbf795678b857b3b66ba0911 (patch) | |
tree | e3ce1a368cde856155fc52c37e1c6507e25ea977 /include/configs/RPXlite_DW.h | |
parent | 8ed9604613398660f9ee855060661da8809d4045 (diff) | |
download | u-boot-imx-6225c5db6cb5a727cbf795678b857b3b66ba0911.zip u-boot-imx-6225c5db6cb5a727cbf795678b857b3b66ba0911.tar.gz u-boot-imx-6225c5db6cb5a727cbf795678b857b3b66ba0911.tar.bz2 |
* Patch by Sam Song, 11 October 2004:
- Add RESET/PREBOOT/AUTOBOOT support for RPXlite_DW board
- Adjust CPU:BUS frequency ratio 1:1 when core frequency
less than 50MHz
* Patch by Sam Song, 10 Oct 2004:
Fix a parameter error in run_command() in main.c
Diffstat (limited to 'include/configs/RPXlite_DW.h')
-rw-r--r-- | include/configs/RPXlite_DW.h | 54 |
1 files changed, 47 insertions, 7 deletions
diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h index d0e427d..6f23931 100644 --- a/include/configs/RPXlite_DW.h +++ b/include/configs/RPXlite_DW.h @@ -45,6 +45,7 @@ */ /* #define DEBUG 1 */ +/* #ifdef DEPLOYMENT 1 */ #undef CONFIG_MPC860 #define CONFIG_MPC823 1 /* This is a MPC823e CPU. */ @@ -59,19 +60,31 @@ #undef CONFIG_8xx_CONS_NONE #define CONFIG_BAUDRATE 9600 /* console default baudrate = 9600bps */ -#ifdef CONFIG_LCD -#define CONFIG_BOOTDELAY 12 /* autoboot after 12 seconds */ +#ifdef DEBUG +#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #else -#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ +#define CONFIG_BOOTDELAY 6 /* autoboot after 6 seconds */ + +#ifdef DEPLOYMENT +#define CONFIG_BOOT_RETRY_TIME -1 +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 'st')...\n" +#define CONFIG_AUTOBOOT_STOP_STR "st" +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_RESET_TO_RETRY 1 +#define CONFIG_BOOT_RETRY_MIN 1 #endif +#endif + +/* pre-boot commands */ +#define CONFIG_PREBOOT "setenv stdout serial;setenv stdin serial" #undef CONFIG_BOOTARGS #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ - "nfsargs=setenv bootargs console=ttyS0,9600 root=/dev/nfs rw " \ - "nfsroot=$(serverip):$(rootpath)\0" \ - "ramargs=setenv bootargs console=tty0 console=ttyS0,9600 " \ - "root=/dev/ram rw\0" \ + "nfsargs=setenv bootargs console=tty0 console=ttyS0,9600 " \ + "root=/dev/nfs rw nfsroot=$(serverip):$(rootpath)\0" \ + "ramargs=setenv bootargs console=tty0 root=/dev/ram rw\0" \ "addip=setenv bootargs $(bootargs) " \ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ ":$(hostname):$(netdev):off panic=1\0" \ @@ -82,9 +95,25 @@ "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ "gatewayip=172.16.115.254\0" \ "netmask=255.255.255.0\0" \ +<<<<<<< RPXlite_DW.h + "kernel_addr=ff040000\0" \ + "ramdisk_addr=ff200000\0" \ + "ku=era $(kernel_addr) ff1fffff;cp.b 100000 $(kernel_addr) " \ + "$(filesize);md $(kernel_addr);" \ + "echo kernel updating finished\0" \ + "uu=protect off 1:0-4;era 1:0-4;cp.b 100000 ff000000 " \ + "$(filesize);md ff000000;" \ + "echo u-boot updating finished\0" \ + "eu=protect off 1:6;era 1:6;reset\0" \ + "lcd=setenv stdout lcd;setenv stdin lcd\0" \ + "ser=setenv stdout serial;setenv stdin serial\0" \ + "verify=no" + +======= "kernel_addr=ff080000\0" \ "ramdisk_addr=ff200000\0" \ "" +>>>>>>> 1.3 #define CONFIG_BOOTCOMMAND "run flash_self" #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ @@ -178,8 +207,13 @@ #define CFG_ENV_SIZE 0x8000 /* Total Size of Environment Sector */ #endif +<<<<<<< RPXlite_DW.h +#define CFG_RESET_ADDRESS ((ulong)((((immap_t *)CFG_IMMR)->im_clkrst.res))) + +======= #define CFG_RESET_ADDRESS ((ulong)((((immap_t *)CFG_IMMR)->im_clkrst.res))) +>>>>>>> 1.3 /*----------------------------------------------------------------------- * Cache Configuration */ @@ -254,10 +288,16 @@ /* Up to 48MHz system clock, we use 1:1 SYSTEM/BUS ratio */ #if defined(RPXlite_64MHz) #define CFG_SCCR ( SCCR_TBS | SCCR_EBDF01 ) /* %%%SCCR:0x02020000 */ +<<<<<<< RPXlite_DW.h +#else +#define CFG_SCCR ( SCCR_TBS | SCCR_EBDF00 ) /* %%%SCCR:0x02000000 */ +#endif +======= #else #define CFG_SCCR ( SCCR_TBS | SCCR_EBDF00 ) /* %%%SCCR:0x02000000 */ #endif +>>>>>>> 1.3 /*----------------------------------------------------------------------- * PCMCIA stuff *----------------------------------------------------------------------- |