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author | Kim Phillips <kim.phillips@freescale.com> | 2009-01-21 18:38:51 -0600 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2009-01-21 18:38:51 -0600 |
commit | be4880ebe4355e8782be4af4b337a1b98dffcbe3 (patch) | |
tree | 8b699181073305221b95f338a2d9107ab1bbfa3f /include/configs/PMC440.h | |
parent | 633639587e3596f0dbf5e6247dd3faf80b1d9063 (diff) | |
parent | 72d15e705bc3983884105cb7755c7ba80e74a0a5 (diff) | |
download | u-boot-imx-be4880ebe4355e8782be4af4b337a1b98dffcbe3.zip u-boot-imx-be4880ebe4355e8782be4af4b337a1b98dffcbe3.tar.gz u-boot-imx-be4880ebe4355e8782be4af4b337a1b98dffcbe3.tar.bz2 |
Merge branch 'master' into next
Diffstat (limited to 'include/configs/PMC440.h')
-rw-r--r-- | include/configs/PMC440.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 7219bb8..f9f1002 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -219,8 +219,8 @@ #if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ #endif -#define CFG_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ - /* 440EPx errata CHIP 11 */ +#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ + /* 440EPx errata CHIP 11 */ /*----------------------------------------------------------------------- * I2C @@ -490,8 +490,8 @@ #endif /* Memory Bank 1 (RESET) initialization */ -#define CFG_EBC_PB1AP 0x7f817200 //0x03017200 -#define CFG_EBC_PB1CR (CFG_RESET_BASE | 0x1c000) +#define CONFIG_SYS_EBC_PB1AP 0x7f817200 /* 0x03017200 */ +#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000) /* Memory Bank 4 (FPGA / 32Bit) initialization */ #define CONFIG_SYS_EBC_PB4AP 0x03840f40 /* BME=0,TWT=7,CSN=1,TH=7,RE=1,SOR=0,BEM=1 */ |