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| author | Minkyu Kang <mk7.kang@samsung.com> | 2010-04-19 10:26:18 +0900 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-04-19 10:26:18 +0900 |
| commit | 83653121d7382fccfe329cb732f77f116341ef1d (patch) | |
| tree | 0b1ce6764252af15dfb2614372de98a44a7ec61f /include/configs/PCI5441.h | |
| parent | 0f1f21a345e02a68ec16f7ab9e7dc687f9276089 (diff) | |
| parent | 07739bcef5da07cc4a4edef8b91014ccc332eda3 (diff) | |
| download | u-boot-imx-83653121d7382fccfe329cb732f77f116341ef1d.zip u-boot-imx-83653121d7382fccfe329cb732f77f116341ef1d.tar.gz u-boot-imx-83653121d7382fccfe329cb732f77f116341ef1d.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
cpu/arm1176/cpu.c
cpu/arm1176/start.S
cpu/arm_cortexa8/s5pc1xx/Makefile
cpu/arm_cortexa8/s5pc1xx/clock.c
drivers/serial/serial_s5p.c
include/asm-arm/arch-s5pc1xx/clk.h
include/asm-arm/arch-s5pc1xx/gpio.h
include/asm-arm/arch-s5pc1xx/uart.h
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include/configs/PCI5441.h')
| -rw-r--r-- | include/configs/PCI5441.h | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/include/configs/PCI5441.h b/include/configs/PCI5441.h index 831a60d..c60a9f7 100644 --- a/include/configs/PCI5441.h +++ b/include/configs/PCI5441.h @@ -92,7 +92,8 @@ /*------------------------------------------------------------------------ * CONSOLE *----------------------------------------------------------------------*/ -#if defined(CONFIG_CONSOLE_JTAG) +#define CONFIG_ALTERA_UART 1 /* Use altera uart */ +#if defined(CONFIG_ALTERA_JTAG_UART) #define CONFIG_SYS_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */ #else #define CONFIG_SYS_NIOS_CONSOLE 0x009208a0 /* UART base addr */ @@ -113,14 +114,16 @@ * TIMEBASE -- * * The high res timer defaults to 1 msec. Since it includes the period - * registers, we can slow it down to 10 msec using TMRCNT. If the default - * period is acceptable, TMRCNT can be left undefined. + * registers, the interrupt frequency can be reduced using TMRCNT. + * If the default period is acceptable, TMRCNT can be left undefined. + * TMRMS represents the desired mecs per tick (msecs per interrupt). *----------------------------------------------------------------------*/ +#define CONFIG_SYS_HZ 1000 /* Always 1000 */ #define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */ -#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */ -#define CONFIG_SYS_NIOS_TMRMS 10 /* 10 msec per tick */ -#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1)) +#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */ +#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/ +#define CONFIG_SYS_NIOS_TMRCNT \ + (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) /* |