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authorKumar Gala <galak@kernel.crashing.org>2011-02-09 02:00:08 +0000
committerKumar Gala <galak@kernel.crashing.org>2011-04-27 22:29:04 -0500
commite02aea61cb17fc1e39368e4911491305d805e886 (patch)
tree4bbff9a3f7309744dbcea8f2de9e4529127d34b7 /include/configs/P5020DS.h
parentdf8af0b4a63b6375e7abbaffe1f93cc01c34529c (diff)
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powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)
The P3041DS & P5020DS boards are almost identical (except for the processor in them). Additionally they are based on the P4080DS board design so we use the some board code for all 3 boards. Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have meaning on P3041DS/P5020DS. We utilize some of these for SERDES clock configuration. Additionally, the P3041DS/P5020DS support NAND. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/P5020DS.h')
-rw-r--r--include/configs/P5020DS.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h
new file mode 100644
index 0000000..6d279b3
--- /dev/null
+++ b/include/configs/P5020DS.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * P5020 DS board configuration file
+ *
+ */
+#define CONFIG_P5020DS
+#define CONFIG_PHYS_64BIT
+#define CONFIG_PPC_P5020
+
+#define CONFIG_FSL_SATA_V2
+#define CONFIG_PCIE4
+
+#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
+
+#include "corenet_ds.h"
+