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| author | Wolfgang Denk <wd@denx.de> | 2011-01-17 20:31:46 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-01-17 20:31:46 +0100 |
| commit | e1ccf97c5d7651664d37c0c5aa243874b8851b2d (patch) | |
| tree | 666d8970fcb8744ddefb039fc49a7d1a5a1d09e7 /include/configs/P2020DS.h | |
| parent | aad813a342aca1a8127a283c64813e4ae4464d9c (diff) | |
| parent | f133796da8ec87ccbafc9c492636def619d99401 (diff) | |
| download | u-boot-imx-e1ccf97c5d7651664d37c0c5aa243874b8851b2d.zip u-boot-imx-e1ccf97c5d7651664d37c0c5aa243874b8851b2d.tar.gz u-boot-imx-e1ccf97c5d7651664d37c0c5aa243874b8851b2d.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'include/configs/P2020DS.h')
| -rw-r--r-- | include/configs/P2020DS.h | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 0af2152..b6e3260 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -1,5 +1,5 @@ /* - * Copyright 2007-2010 Freescale Semiconductor, Inc. + * Copyright 2007-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -45,6 +45,10 @@ #define CONFIG_SYS_TEXT_BASE 0xeff80000 #endif +#define CONFIG_SYS_SRIO +#define CONFIG_SRIO1 /* SRIO port 1 */ +#define CONFIG_SRIO2 /* SRIO port 2 */ + #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -394,6 +398,7 @@ */ /* controller 3, Slot 1, tgtid 3, Base address b000 */ +#define CONFIG_SYS_PCIE3_NAME "Slot 1" #define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 @@ -413,6 +418,7 @@ #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ /* controller 2, direct to uli, tgtid 2, Base address 9000 */ +#define CONFIG_SYS_PCIE2_NAME "ULI" #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 @@ -432,6 +438,7 @@ #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ /* controller 1, Slot 2, tgtid 1, Base address a000 */ +#define CONFIG_SYS_PCIE1_NAME "Slot 2" #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 @@ -469,6 +476,24 @@ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET #endif +/* SRIO1 uses the same window as PCIE2 mem window */ +#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull +#else +#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000 +#endif +#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ + +/* SRIO2 uses the same window as PCIE1 mem window */ +#define CONFIG_SYS_SRIO2_MEM_VIRT 0xc0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc40000000ull +#else +#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc0000000 +#endif +#define CONFIG_SYS_SRIO2_MEM_SIZE 0x20000000 /* 512M */ + #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ @@ -608,6 +633,7 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |