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authorKumar Gala <galak@kernel.crashing.org>2009-07-14 22:42:01 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-07-22 09:42:22 -0500
commit6bb5b412291177e6edd42f9a80e5c5afe57a6a0f (patch)
treee76ab269e5a3d402a738ad8b9716282bf2103a86 /include/configs/P2020DS.h
parent9af9c6bdc16da53772c56b1a79c2c91701fe94e6 (diff)
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85xx: Report which "bank" of NOR flash we are booting from on FSL boards
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of swizzling the upper address bits of the NOR flash we boot out of which creates the concept of "virtual" banks. This is useful in that we can flash a test of image of u-boot and reset to one of the virtual banks while still maintaining a working image in "bank 0". The PIXIS FPGA exposes registers on LBC which we can use to determine which "bank" we are booting out of (as well as setting which bank to boot out of). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/P2020DS.h')
-rw-r--r--include/configs/P2020DS.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index d4b48d0..5c2c5cb 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -282,6 +282,11 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
#define PIXIS_VWATCH 0x24 /* Watchdog Register */
#define PIXIS_LED 0x25 /* LED Register */
+#define PIXIS_SW(x) 0x20 + (x - 1) * 2
+#define PIXIS_EN(x) 0x21 + (x - 1) * 2
+#define PIXIS_SW7_LBMAP 0xc0 /* SW7 - cfg_lbmap */
+#define PIXIS_SW7_VBANK 0x30 /* SW7 - cfg_vbank */
+
/* old pixis referenced names */
#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */