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| author | Wolfgang Denk <wd@denx.de> | 2009-07-07 22:35:02 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-07-07 22:35:02 +0200 |
| commit | 8e5e9b940cdede0debe528cdd7edccccbb3ebf2a (patch) | |
| tree | 61647a9af02a1bdb5e498ed467d4eccdb8e706b7 /include/configs/P2020DS.h | |
| parent | a48ecc969f8d2d0fe9167962e9b8b4cca52de10b (diff) | |
| download | u-boot-imx-8e5e9b940cdede0debe528cdd7edccccbb3ebf2a.zip u-boot-imx-8e5e9b940cdede0debe528cdd7edccccbb3ebf2a.tar.gz u-boot-imx-8e5e9b940cdede0debe528cdd7edccccbb3ebf2a.tar.bz2 | |
Coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs/P2020DS.h')
| -rw-r--r-- | include/configs/P2020DS.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index fddcce5..9306860 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -110,7 +110,9 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #define CONFIG_FSL_DDR3 1 #undef CONFIG_FSL_DDR_INTERACTIVE -// #define CONFIG_DDR_ECC /* ECC will be enabled based on perf_mode environment variable */ +/* ECC will be enabled based on perf_mode environment variable */ +/* #define CONFIG_DDR_ECC */ + #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xDeadBeef @@ -126,7 +128,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ /* These are used when DDR doesn't use SPD. */ -//#define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */ #define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR is 1GB */ /* Default settings for "stable" mode */ |