summaryrefslogtreecommitdiff
path: root/include/configs/P1_P2_RDB.h
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2010-12-01 22:55:54 -0600
committerKumar Gala <galak@kernel.crashing.org>2010-12-13 09:32:15 -0600
commit72c96a6802d9b1c949785d1d152f8bc8666c753d (patch)
treee22f1e828882e091dc84c32ebdfef592195d0763 /include/configs/P1_P2_RDB.h
parentac8983bcba75576c50307b5e8dc8fb848740ee61 (diff)
downloadu-boot-imx-72c96a6802d9b1c949785d1d152f8bc8666c753d.zip
u-boot-imx-72c96a6802d9b1c949785d1d152f8bc8666c753d.tar.gz
u-boot-imx-72c96a6802d9b1c949785d1d152f8bc8666c753d.tar.bz2
tsec: Revert to setting TBICR_ANEG_ENABLE by default for SGMII
The following commit: commit 46e91674fb4b6d06c6a4984c0b5ac7d9a16923f4 Author: Peter Tyser <ptyser@xes-inc.com> Date: Tue Nov 3 17:52:07 2009 -0600 tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode Removed setting Auto-Neg by default, however this is believed to be proper default configuration for initialization of the TBI interface. Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require Auto-Neg to be disabled to function properly. This addresses a breakage on the P2020 DS & MPC8572 DS boards when used with an SGMII riser card. We also remove setting CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the default setting is sufficient for them. Additionally, we clean up the code a bit to remove an unnecessary second define. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'include/configs/P1_P2_RDB.h')
-rw-r--r--include/configs/P1_P2_RDB.h8
1 files changed, 0 insertions, 8 deletions
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index a21afb7..2dfee3d 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -437,14 +437,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-/* TBI PHY configuration for SGMII mode */
-#define CONFIG_TSEC_TBICR_SETTINGS ( \
- TBICR_PHY_RESET \
- | TBICR_ANEG_ENABLE \
- | TBICR_FULL_DUPLEX \
- | TBICR_SPEED1_SET \
- )
-
#endif /* CONFIG_TSEC_ENET */
/*