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authorBen Warren <bwarren@qstreams.com>2007-08-13 21:26:03 -0400
committerBen Warren <bwarren@qstreams.com>2007-08-13 21:26:03 -0400
commitd1bc6c8d5f4a9c7ca9fb2292d5c65f846dcc3995 (patch)
treedd0722cee4758fe40f6a5cc75986ebb1a395aac2 /include/configs/ORSG.h
parentf539edc076cfe52bff919dd512ba8d7af0e22092 (diff)
parent8a92b7c60b40ff79e2cc96e13aeac2a531dde473 (diff)
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Sync'd u-boot-net with mainline
Merge git://www.denx.de/git/u-boot Conflicts: drivers/bcm570x.c drivers/tigon3.c
Diffstat (limited to 'include/configs/ORSG.h')
-rw-r--r--include/configs/ORSG.h36
1 files changed, 24 insertions, 12 deletions
diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h
index 2e7c505..937df22 100644
--- a/include/configs/ORSG.h
+++ b/include/configs/ORSG.h
@@ -54,20 +54,32 @@
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ASKENV | \
- CFG_CMD_ELF | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -77,7 +89,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -213,7 +225,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif