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authorwdenk <wdenk>2005-03-14 23:01:03 +0000
committerwdenk <wdenk>2005-03-14 23:01:03 +0000
commitc3fafecff12103691613de73f461626fd51fef95 (patch)
tree06d9af6b6e1a250286eb443368f2a5bee1f4b62a /include/configs/NC650.h
parenta0bdf49e399e9e25e71081c5b3e73fc56c63a236 (diff)
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Patch by Detlev Zundel, 14 Mar 2005:
NC650: changed NAND flash addressing to using UPMB
Diffstat (limited to 'include/configs/NC650.h')
-rw-r--r--include/configs/NC650.h12
1 files changed, 9 insertions, 3 deletions
diff --git a/include/configs/NC650.h b/include/configs/NC650.h
index 8966909..2fc098e 100644
--- a/include/configs/NC650.h
+++ b/include/configs/NC650.h
@@ -309,7 +309,7 @@
#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V)
/*
- * BR2 and OR2 (NAND Flash)
+ * BR2 and OR2 (NAND Flash) - now addressed through UPMB
*/
#define CFG_NAND_BASE 0x50000000
#define CFG_NAND_SIZE 0x04000000
@@ -317,8 +317,8 @@
#define CFG_OR_TIMING_NAND (OR_CSNT_SAM | OR_ACS_DIV1 | OR_BI | \
OR_SCY_15_CLK | OR_EHTR | OR_TRLX)
-#define CFG_BR2_PRELIM ((CFG_NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V )
-#define CFG_OR2_PRELIM (((-CFG_NAND_SIZE) & OR_AM_MSK) | CFG_OR_TIMING_NAND)
+#define CFG_BR2_PRELIM ((CFG_NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_MS_UPMB | BR_V )
+#define CFG_OR2_PRELIM (((-CFG_NAND_SIZE) & OR_AM_MSK) | OR_BI )
/*
* BR3 and OR3 (SDRAM)
@@ -383,6 +383,12 @@
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
/*
+ * MBMR settings for NAND flash
+ */
+
+#define CFG_MBMR_NAND ( MBMR_WLFB_5X )
+
+/*
* Internal Definitions
*
* Boot Flags