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| author | Jon Loeliger <jdl@freescale.com> | 2007-07-08 14:14:17 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2007-07-08 16:05:30 -0500 |
| commit | 8353e139bfad9059c54f5b2421f1a3090e15a2e2 (patch) | |
| tree | 92aa4065f298f472f7832bcf724be06bb5e46a61 /include/configs/MVS1.h | |
| parent | 348f258f24253433e4a2302a0bbceb6740a67246 (diff) | |
| download | u-boot-imx-8353e139bfad9059c54f5b2421f1a3090e15a2e2.zip u-boot-imx-8353e139bfad9059c54f5b2421f1a3090e15a2e2.tar.gz u-boot-imx-8353e139bfad9059c54f5b2421f1a3090e15a2e2.tar.bz2 | |
include/configs: Use new CONFIG_CMD_* in various M* named board config files.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'include/configs/MVS1.h')
| -rw-r--r-- | include/configs/MVS1.h | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/include/configs/MVS1.h b/include/configs/MVS1.h index 5995918..709ee86 100644 --- a/include/configs/MVS1.h +++ b/include/configs/MVS1.h @@ -70,20 +70,21 @@ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ -/* MVsensor uses a really minimal U-Boot ! */ -#define CONFIG_COMMANDS (CFG_CMD_LOADS | \ - CFG_CMD_LOADB | \ - CFG_CMD_IMI | \ - CFG_CMD_FLASH | \ - CFG_CMD_MEMORY | \ - CFG_CMD_NET | \ - CFG_CMD_DHCP | \ - CFG_CMD_ENV | \ - CFG_CMD_BOOTD | \ - CFG_CMD_RUN ) - -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include <cmd_confdefs.h> + +/* + * Command line configuration. + */ +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_IMI +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NET +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_BOOTD +#define CONFIG_CMD_RUN + /* * Miscellaneous configurable options @@ -96,7 +97,7 @@ #define CFG_PROMPT_HUSH_PS2 "> " #endif -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ @@ -172,7 +173,7 @@ * Cache Configuration */ #define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ #endif |