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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /include/configs/MVBC_P.h | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/MVBC_P.h')
-rw-r--r-- | include/configs/MVBC_P.h | 118 |
1 files changed, 59 insertions, 59 deletions
diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 21475fb..cd910ea 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -32,21 +32,21 @@ #define CONFIG_MPC5xxx 1 #define CONFIG_MPC5200 1 -#define CFG_MPC5XXX_CLKIN 33000000 +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 #define BOOTFLAG_COLD 0x01 #define BOOTFLAG_WARM 0x02 #define CONFIG_MISC_INIT_R 1 -#define CFG_CACHELINE_SIZE 32 +#define CONFIG_SYS_CACHELINE_SIZE 32 #ifdef CONFIG_CMD_KGDB -#define CFG_CACHELINE_SHIFT 5 +#define CONFIG_SYS_CACHELINE_SHIFT 5 #endif #define CONFIG_PSC_CONSOLE 1 #define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200, 230400} +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200, 230400} #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 @@ -61,7 +61,7 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000 -#define CFG_XLB_PIPELINING 1 +#define CONFIG_SYS_XLB_PIPELINING 1 #define CONFIG_HIGH_BATS 1 #define MV_CI mvBlueCOUGAR-P @@ -190,33 +190,33 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBCLK_EQUALS_XLBCLK -#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 +#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK +#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* * Flash configuration */ #undef CONFIG_FLASH_16BIT -#define CFG_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI #define CONFIG_FLASH_CFI_DRIVER -#define CFG_FLASH_CFI_AMD_RESET 1 -#define CFG_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 +#define CONFIG_SYS_FLASH_EMPTY_INFO -#define CFG_FLASH_ERASE_TOUT 50000 -#define CFG_FLASH_WRITE_TOUT 1000 +#define CONFIG_SYS_FLASH_ERASE_TOUT 50000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 1000 -#define CFG_MAX_FLASH_BANKS 1 -#define CFG_MAX_FLASH_SECT 256 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CFG_LOWBOOT -#define CFG_FLASH_BASE TEXT_BASE -#define CFG_FLASH_SIZE 0x00800000 +#define CONFIG_SYS_LOWBOOT +#define CONFIG_SYS_FLASH_BASE TEXT_BASE +#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* * Environment settings */ #define CONFIG_ENV_IS_IN_FLASH -#undef CFG_FLASH_PROTECTION +#undef CONFIG_SYS_FLASH_PROTECTION #define CONFIG_ENV_ADDR 0xFFFE0000 #define CONFIG_ENV_SIZE 0x10000 @@ -227,26 +227,26 @@ /* * Memory map */ -#define CFG_MBAR 0xF0000000 -#define CFG_SDRAM_BASE 0x00000000 -#define CFG_DEFAULT_MBAR 0x80000000 +#define CONFIG_SYS_MBAR 0xF0000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 -#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM -#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE +#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE -#define CFG_GBL_DATA_SIZE 128 -#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CFG_MONITOR_BASE TEXT_BASE -#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) -#define CFG_RAMBOOT 1 +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +#define CONFIG_SYS_RAMBOOT 1 #endif -/* CFG_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ -#define CFG_MONITOR_LEN (512 << 10) -#define CFG_MALLOC_LEN (512 << 10) -#define CFG_BOOTMAPSZ (8 << 20) +/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ +#define CONFIG_SYS_MONITOR_LEN (512 << 10) +#define CONFIG_SYS_MALLOC_LEN (512 << 10) +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* * Ethernet configuration @@ -263,52 +263,52 @@ /* * Miscellaneous configurable options */ -#define CFG_HUSH_PARSER +#define CONFIG_SYS_HUSH_PARSER #define CONFIG_CMDLINE_EDITING -#define CFG_PROMPT_HUSH_PS2 "> " -#undef CFG_LONGHELP -#define CFG_PROMPT "=> " +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#undef CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " #ifdef CONFIG_CMD_KGDB -#define CFG_CBSIZE 1024 +#define CONFIG_SYS_CBSIZE 1024 #else -#define CFG_CBSIZE 256 +#define CONFIG_SYS_CBSIZE 256 #endif -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) -#define CFG_MAXARGS 16 -#define CFG_BARGSIZE CFG_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CFG_MEMTEST_START 0x00800000 -#define CFG_MEMTEST_END 0x02f00000 +#define CONFIG_SYS_MEMTEST_START 0x00800000 +#define CONFIG_SYS_MEMTEST_END 0x02f00000 -#define CFG_HZ 1000 +#define CONFIG_SYS_HZ 1000 /* default load address */ -#define CFG_LOAD_ADDR 0x02000000 +#define CONFIG_SYS_LOAD_ADDR 0x02000000 /* default location for tftp and bootm */ #define CONFIG_LOADADDR 0x00200000 /* * Various low-level settings */ -#define CFG_GPS_PORT_CONFIG 0x20000004 +#define CONFIG_SYS_GPS_PORT_CONFIG 0x20000004 -#define CFG_HID0_INIT (HID0_ICE | HID0_ICFI) -#define CFG_HID0_FINAL HID0_ICE +#define CONFIG_SYS_HID0_INIT (HID0_ICE | HID0_ICFI) +#define CONFIG_SYS_HID0_FINAL HID0_ICE -#define CFG_BOOTCS_START CFG_FLASH_BASE -#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#define CFG_BOOTCS_CFG 0x00047800 -#define CFG_CS0_START CFG_FLASH_BASE -#define CFG_CS0_SIZE CFG_FLASH_SIZE +#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE +#define CONFIG_SYS_BOOTCS_CFG 0x00047800 +#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE -#define CFG_CS_BURST 0x000000f0 -#define CFG_CS_DEADCYCLE 0x33333303 +#define CONFIG_SYS_CS_BURST 0x000000f0 +#define CONFIG_SYS_CS_DEADCYCLE 0x33333303 -#define CFG_RESET_ADDRESS 0x00000100 +#define CONFIG_SYS_RESET_ADDRESS 0x00000100 #undef FPGA_DEBUG -#undef CFG_FPGA_PROG_FEEDBACK -#define CONFIG_FPGA CFG_ALTERA_CYCLON2 +#undef CONFIG_SYS_FPGA_PROG_FEEDBACK +#define CONFIG_FPGA CONFIG_SYS_ALTERA_CYCLON2 #define CONFIG_FPGA_ALTERA 1 #define CONFIG_FPGA_CYCLON2 1 #define CONFIG_FPGA_COUNT 1 |