Merge branch 'master' of /home/wd/git/u-boot/master

1 files changed, 39 insertions, 44 deletions

diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 94e4d24..0d1f779 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2006 Freescale Semiconductor.
+ * Copyright 2006, 2010 Freescale Semiconductor.
  *
  * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
  *
@@ -58,8 +58,8 @@
 
 #ifndef CONFIG_RIO			/* RIO/PCI are mutually exclusive */
 #define CONFIG_PCI		1	/* Enable PCI/PCIE */
-#define CONFIG_PCI1		1	/* PCIE controler 1 (ULI bridge) */
-#define CONFIG_PCI2		1	/* PCIE controler 2 (slot) */
+#define CONFIG_PCIE1		1	/* PCIE controler 1 (ULI bridge) */
+#define CONFIG_PCIE2		1	/* PCIE controler 2 (slot) */
 #define CONFIG_FSL_PCI_INIT	1	/* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT	1	/* enable 64-bit PCI resources */
 #endif
@@ -122,9 +122,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS		CONFIG_SYS_CCSRBAR_PHYS_LOW
 #endif
 
-#define CONFIG_SYS_PCI1_ADDR		(CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR		(CONFIG_SYS_CCSRBAR+0x9000)
-
 /*
  * DDR Setup
  */
@@ -328,43 +325,43 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  * Addresses are mapped 1-1.
  */
 
-#define CONFIG_SYS_PCI1_MEM_VIRT	0x80000000
+#define CONFIG_SYS_PCIE1_MEM_VIRT	0x80000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCI1_MEM_BUS		0xe0000000
-#define CONFIG_SYS_PCI1_MEM_PHYS	0x0000000c00000000ULL
+#define CONFIG_SYS_PCIE1_MEM_BUS	0xe0000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS	0x0000000c00000000ULL
 #else
-#define CONFIG_SYS_PCI1_MEM_BUS		CONFIG_SYS_PCI1_MEM_VIRT
-#define CONFIG_SYS_PCI1_MEM_PHYS	CONFIG_SYS_PCI1_MEM_VIRT
+#define CONFIG_SYS_PCIE1_MEM_BUS	CONFIG_SYS_PCIE1_MEM_VIRT
+#define CONFIG_SYS_PCIE1_MEM_PHYS	CONFIG_SYS_PCIE1_MEM_VIRT
 #endif
-#define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
-#define CONFIG_SYS_PCI1_IO_BUS	0x00000000
-#define CONFIG_SYS_PCI1_IO_VIRT	0xffc00000
-#define CONFIG_SYS_PCI1_IO_PHYS	(CONFIG_SYS_PCI1_IO_VIRT \
+#define CONFIG_SYS_PCIE1_MEM_SIZE	0x20000000	/* 512M */
+#define CONFIG_SYS_PCIE1_IO_BUS		0x00000000
+#define CONFIG_SYS_PCIE1_IO_VIRT	0xffc00000
+#define CONFIG_SYS_PCIE1_IO_PHYS	(CONFIG_SYS_PCIE1_IO_VIRT \
 				 | CONFIG_SYS_PHYS_ADDR_HIGH)
-#define CONFIG_SYS_PCI1_IO_SIZE	0x00010000	/* 64K */
+#define CONFIG_SYS_PCIE1_IO_SIZE	0x00010000	/* 64K */
 
 #ifdef CONFIG_PHYS_64BIT
 /*
- * Use the same PCI bus address on PCI1 and PCI2 if we have PHYS_64BIT.
+ * Use the same PCI bus address on PCIE1 and PCIE2 if we have PHYS_64BIT.
  * This will increase the amount of PCI address space available for
  * for mapping RAM.
  */
-#define CONFIG_SYS_PCI2_MEM_BUS		CONFIG_SYS_PCI1_MEM_BUS
+#define CONFIG_SYS_PCIE2_MEM_BUS	CONFIG_SYS_PCIE1_MEM_BUS
 #else
-#define CONFIG_SYS_PCI2_MEM_BUS		(CONFIG_SYS_PCI1_MEM_BUS \
-					 + CONFIG_SYS_PCI1_MEM_SIZE)
+#define CONFIG_SYS_PCIE2_MEM_BUS	(CONFIG_SYS_PCIE1_MEM_BUS \
+					 + CONFIG_SYS_PCIE1_MEM_SIZE)
 #endif
-#define CONFIG_SYS_PCI2_MEM_VIRT 	(CONFIG_SYS_PCI1_MEM_VIRT \
-					 + CONFIG_SYS_PCI1_MEM_SIZE)
-#define CONFIG_SYS_PCI2_MEM_PHYS	(CONFIG_SYS_PCI1_MEM_PHYS \
-					 + CONFIG_SYS_PCI1_MEM_SIZE)
-#define CONFIG_SYS_PCI2_MEM_SIZE	0x20000000	/* 512M */
-#define CONFIG_SYS_PCI2_IO_BUS	0x00000000
-#define CONFIG_SYS_PCI2_IO_VIRT (CONFIG_SYS_PCI1_IO_VIRT \
-				 + CONFIG_SYS_PCI1_IO_SIZE)
-#define CONFIG_SYS_PCI2_IO_PHYS	(CONFIG_SYS_PCI1_IO_PHYS \
-				 + CONFIG_SYS_PCI1_IO_SIZE)
-#define CONFIG_SYS_PCI2_IO_SIZE	CONFIG_SYS_PCI1_IO_SIZE
+#define CONFIG_SYS_PCIE2_MEM_VIRT 	(CONFIG_SYS_PCIE1_MEM_VIRT \
+					 + CONFIG_SYS_PCIE1_MEM_SIZE)
+#define CONFIG_SYS_PCIE2_MEM_PHYS	(CONFIG_SYS_PCIE1_MEM_PHYS \
+					 + CONFIG_SYS_PCIE1_MEM_SIZE)
+#define CONFIG_SYS_PCIE2_MEM_SIZE	0x20000000	/* 512M */
+#define CONFIG_SYS_PCIE2_IO_BUS		0x00000000
+#define CONFIG_SYS_PCIE2_IO_VIRT 	(CONFIG_SYS_PCIE1_IO_VIRT \
+					 + CONFIG_SYS_PCIE1_IO_SIZE)
+#define CONFIG_SYS_PCIE2_IO_PHYS	(CONFIG_SYS_PCIE1_IO_PHYS \
+					 + CONFIG_SYS_PCIE1_IO_SIZE)
+#define CONFIG_SYS_PCIE2_IO_SIZE	CONFIG_SYS_PCIE1_IO_SIZE
 
 #if defined(CONFIG_PCI)
 
@@ -393,10 +390,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS	1
 
 /*PCIE video card used*/
-#define VIDEO_IO_OFFSET		CONFIG_SYS_PCI2_IO_VIRT
+#define VIDEO_IO_OFFSET		CONFIG_SYS_PCIE2_IO_VIRT
 
 /*PCI video card used*/
-/*#define VIDEO_IO_OFFSET	CONFIG_SYS_PCI1_IO_VIRT*/
+/*#define VIDEO_IO_OFFSET	CONFIG_SYS_PCIE1_IO_VIRT*/
 
 /* video */
 #define CONFIG_VIDEO
@@ -409,7 +406,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_ATI_RADEON_FB
 #define CONFIG_VIDEO_LOGO
 /*#define CONFIG_CONSOLE_CURSOR*/
-#define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCI2_IO_VIRT
+#define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCIE2_IO_VIRT
 #endif
 
 #undef CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
@@ -425,8 +422,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_SCSI_MAXDEVICE	CONFIG_SYS_SCSI_MAX_DEVICE
 #endif
 
-#define CONFIG_MPC86XX_PCI2
-
 #endif	/* CONFIG_PCI */
 
 #if defined(CONFIG_TSEC_ENET)
@@ -497,17 +492,17 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_IBAT1U	CONFIG_SYS_DBAT1U
 
 /* if CONFIG_PCI:
- * BAT2		PCI1 and PCI1 MEM
+ * BAT2		PCIE1 and PCIE1 MEM
  * if CONFIG_RIO
  * BAT2		Rapidio Memory
  */
 #ifdef CONFIG_PCI
-#define CONFIG_SYS_DBAT2L	(BAT_PHYS_ADDR(CONFIG_SYS_PCI1_MEM_PHYS) \
+#define CONFIG_SYS_DBAT2L	(BAT_PHYS_ADDR(CONFIG_SYS_PCIE1_MEM_PHYS) \
 				 | BATL_PP_RW | BATL_CACHEINHIBIT \
 				 | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U	(CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_1G \
+#define CONFIG_SYS_DBAT2U	(CONFIG_SYS_PCIE1_MEM_VIRT | BATU_BL_1G \
 				 | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT2L	(BAT_PHYS_ADDR(CONFIG_SYS_PCI1_MEM_PHYS) \
+#define CONFIG_SYS_IBAT2L	(BAT_PHYS_ADDR(CONFIG_SYS_PCIE1_MEM_PHYS) \
 				 | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CONFIG_SYS_IBAT2U	CONFIG_SYS_DBAT2U
 #else /* CONFIG_RIO */
@@ -556,14 +551,14 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
 
 /*
- * BAT4		PCI1_IO and PCI2_IO
+ * BAT4		PCIE1_IO and PCIE2_IO
  */
-#define CONFIG_SYS_DBAT4L	(BAT_PHYS_ADDR(CONFIG_SYS_PCI1_IO_PHYS) \
+#define CONFIG_SYS_DBAT4L	(BAT_PHYS_ADDR(CONFIG_SYS_PCIE1_IO_PHYS) \
 				 | BATL_PP_RW | BATL_CACHEINHIBIT \
 				 | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT4U	(CONFIG_SYS_PCI1_IO_VIRT | BATU_BL_128K \
+#define CONFIG_SYS_DBAT4U	(CONFIG_SYS_PCIE1_IO_VIRT | BATU_BL_128K \
 				 | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT4L	(BAT_PHYS_ADDR(CONFIG_SYS_PCI1_IO_PHYS) \
+#define CONFIG_SYS_IBAT4L	(BAT_PHYS_ADDR(CONFIG_SYS_PCIE1_IO_PHYS) \
 				 | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CONFIG_SYS_IBAT4U	CONFIG_SYS_DBAT4U