Merge with /home/wd/git/u-boot/custodian/u-boot-testing

1 files changed, 57 insertions, 54 deletions

diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 12af24f..5a511e5 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -46,8 +46,10 @@
 
 #define CFG_RESET_ADDRESS    0xfff00100
 
-/*#undef CONFIG_PCI*/
-#define CONFIG_PCI
+#define CONFIG_PCI		1	/* Enable PCI/PCIE */
+#define CONFIG_PCI1		1	/* PCIE controler 1 (ULI bridge) */
+#define CONFIG_PCI2		1	/* PCIE controler 2 (slot) */
+#define CONFIG_FSL_PCI_INIT	1	/* Use common FSL init code */
 
 #define CONFIG_TSEC_ENET 		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
@@ -76,6 +78,9 @@
 #define L2_ENABLE	(L2CR_L2E)
 
 #ifndef CONFIG_SYS_CLK_FREQ
+#ifndef __ASSEMBLY__
+extern unsigned long get_board_sys_clk(unsigned long dummy);
+#endif
 #define CONFIG_SYS_CLK_FREQ     get_board_sys_clk(0)
 #endif
 
@@ -93,6 +98,9 @@
 #define CFG_CCSRBAR		0xf8000000	/* relocated CCSRBAR */
 #define CFG_IMMR		CFG_CCSRBAR	/* PQII uses CFG_IMMR */
 
+#define CFG_PCI1_ADDR		(CFG_CCSRBAR+0x8000)
+#define CFG_PCI2_ADDR		(CFG_CCSRBAR+0x9000)
+
 /*
  * DDR Setup
  */
@@ -296,9 +304,9 @@
 #define CFG_PCI1_MEM_BASE	0x80000000
 #define CFG_PCI1_MEM_PHYS	CFG_PCI1_MEM_BASE
 #define CFG_PCI1_MEM_SIZE	0x20000000	/* 512M */
-#define CFG_PCI1_IO_BASE	0xe2000000
-#define CFG_PCI1_IO_PHYS	CFG_PCI1_IO_BASE
-#define CFG_PCI1_IO_SIZE	0x1000000	/* 16M */
+#define CFG_PCI1_IO_BASE	0x00000000
+#define CFG_PCI1_IO_PHYS	0xe2000000
+#define CFG_PCI1_IO_SIZE	0x00100000	/* 1M */
 
 /* PCI view of System Memory */
 #define CFG_PCI_MEMORY_BUS      0x00000000
@@ -311,10 +319,10 @@
 
 #define CFG_PCI2_MEM_BASE	0xa0000000
 #define CFG_PCI2_MEM_PHYS	CFG_PCI2_MEM_BASE
-#define CFG_PCI2_MEM_SIZE	0x10000000	/* 256M */
-#define CFG_PCI2_IO_BASE	0xe3000000
-#define CFG_PCI2_IO_PHYS	CFG_PCI2_IO_BASE
-#define CFG_PCI2_IO_SIZE	0x1000000	/* 16M */
+#define CFG_PCI2_MEM_SIZE	0x20000000	/* 512M */
+#define CFG_PCI2_IO_BASE	0x00000000
+#define CFG_PCI2_IO_PHYS	0xe3000000
+#define CFG_PCI2_IO_SIZE	0x00100000	/* 1M */
 
 #if defined(CONFIG_PCI)
 
@@ -396,20 +404,20 @@
  * 0xa000_0000  512M   PCI-Express 2 Memory
  *	Changed it for operating from 0xd0000000
  */
-#define CFG_DBAT1L      ( CFG_PCI1_MEM_BASE | BATL_PP_RW \
+#define CFG_DBAT1L      ( CFG_PCI1_MEM_PHYS | BATL_PP_RW \
 			| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CFG_DBAT1U      (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CFG_IBAT1L      (CFG_PCI1_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_DBAT1U	(CFG_PCI1_MEM_PHYS | BATU_BL_1G | BATU_VS | BATU_VP)
+#define CFG_IBAT1L	(CFG_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CFG_IBAT1U      CFG_DBAT1U
 
 /*
  * BAT2         512M   Cache-inhibited, guarded
  * 0xc000_0000  512M   RapidIO Memory
  */
-#define CFG_DBAT2L      (CFG_RIO_MEM_BASE | BATL_PP_RW \
+#define CFG_DBAT2L      (CFG_RIO_MEM_PHYS | BATL_PP_RW \
 			| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CFG_DBAT2U      (CFG_RIO_MEM_BASE | BATU_BL_512M | BATU_VS | BATU_VP)
-#define CFG_IBAT2L      (CFG_RIO_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_DBAT2U	(CFG_RIO_MEM_PHYS | BATU_BL_512M | BATU_VS | BATU_VP)
+#define CFG_IBAT2L	(CFG_RIO_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CFG_IBAT2U      CFG_DBAT2U
 
 /*
@@ -428,10 +436,10 @@
  * 0xe300_0000  16M    PCI-Express 2 I/0
  *    Note that this is at 0xe0000000
  */
-#define CFG_DBAT4L      ( CFG_PCI1_IO_BASE | BATL_PP_RW \
+#define CFG_DBAT4L      ( CFG_PCI1_IO_PHYS | BATL_PP_RW \
 			| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CFG_DBAT4U      (CFG_PCI1_IO_BASE | BATU_BL_32M | BATU_VS | BATU_VP)
-#define CFG_IBAT4L      (CFG_PCI1_IO_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_DBAT4U	(CFG_PCI1_IO_PHYS | BATU_BL_32M | BATU_VS | BATU_VP)
+#define CFG_IBAT4L	(CFG_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CFG_IBAT4U      CFG_DBAT4U
 
 /*
@@ -475,39 +483,34 @@
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
 #define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change */
 
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
 #if defined(CFG_RAMBOOT)
-  #if defined(CONFIG_PCI)
-    #define  CONFIG_COMMANDS	((CONFIG_CMD_DFL	\
-				 | CFG_CMD_PING		\
-				 | CFG_CMD_PCI		\
-				 | CFG_CMD_I2C		\
-				 | CFG_CMD_SCSI		\
-				 | CFG_CMD_EXT2)	\
-				&			\
-				 ~(CFG_CMD_ENV))
-  #else
-    #define  CONFIG_COMMANDS	((CONFIG_CMD_DFL	\
-				 | CFG_CMD_PING		\
-				 | CFG_CMD_I2C)		\
-				&			\
-				 ~(CFG_CMD_ENV))
-  #endif
-#else
-  #if defined(CONFIG_PCI)
-    #define  CONFIG_COMMANDS	(CONFIG_CMD_DFL		\
-				| CFG_CMD_PCI		\
-				| CFG_CMD_PING		\
-				| CFG_CMD_I2C		\
-				| CFG_CMD_SCSI		\
-				| CFG_CMD_EXT2)
-  #else
-    #define  CONFIG_COMMANDS	(CONFIG_CMD_DFL		\
-				| CFG_CMD_PING		\
-				| CFG_CMD_I2C)
-  #endif
+    #undef CONFIG_CMD_ENV
+#endif
+
+#if defined(CONFIG_PCI)
+    #define CONFIG_CMD_PCI
+    #define CONFIG_CMD_SCSI
+    #define CONFIG_CMD_EXT2
 #endif
 
-#include <cmd_confdefs.h>
 
 #undef CONFIG_WATCHDOG			/* watchdog disabled */
 
@@ -518,7 +521,7 @@
 #define CFG_LOAD_ADDR	0x2000000	/* default load address */
 #define CFG_PROMPT	"=> "		/* Monitor Command Prompt */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
     #define CFG_CBSIZE	1024		/* Console I/O Buffer Size */
 #else
     #define CFG_CBSIZE	256		/* Console I/O Buffer Size */
@@ -539,8 +542,8 @@
 /* Cache Configuration */
 #define CFG_DCACHE_SIZE		32768
 #define CFG_CACHELINE_SIZE	32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
+#if defined(CONFIG_CMD_KGDB)
+    #define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
 #endif
 
 /*
@@ -551,9 +554,9 @@
 #define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH */
 #define BOOTFLAG_WARM	0x02		/* Software reboot */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
+#if defined(CONFIG_CMD_KGDB)
+    #define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
+    #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
 #endif
 
 /*