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author | Liu Gang <Gang.Liu@freescale.com> | 2013-05-07 16:30:48 +0800 |
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committer | Andy Fleming <afleming@freescale.com> | 2013-06-20 17:08:48 -0500 |
commit | 5870fe44b2a871c5e70c9facd6692b7c14d1842b (patch) | |
tree | 65a6486d1267c3b5223fc549cc3b92e9c45eded6 /include/configs/MPC8610HPCD.h | |
parent | 3a01799b35218137b9051929a74eb2a6d06c5d26 (diff) | |
download | u-boot-imx-5870fe44b2a871c5e70c9facd6692b7c14d1842b.zip u-boot-imx-5870fe44b2a871c5e70c9facd6692b7c14d1842b.tar.gz u-boot-imx-5870fe44b2a871c5e70c9facd6692b7c14d1842b.tar.bz2 |
powerpc/b4860qds: Slave module for boot from SRIO and PCIE
When a b4860qds board boots from SRIO or PCIE, it needs to finish these
processes:
1. Set all the cores in holdoff status.
2. Set the boot location to one PCIE or SRIO interface by RCW.
3. Set a specific TLB entry for the boot process.
4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot.
5. Set a specific TLB entry in order to fetch ucode and ENV from
master.
6. Set a LAW entry with the TargetID one of the PCIE ports for
ucode and ENV.
7. Slave's u-boot image should be generated specifically by
make xxxx_SRIO_PCIE_BOOT_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
For more information about the feature of Boot from SRIO/PCIE, please
refer to the document doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/MPC8610HPCD.h')
0 files changed, 0 insertions, 0 deletions