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authorKumar Gala <galak@kernel.crashing.org>2011-11-09 09:10:49 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-11-09 09:13:39 -0600
commit8d22ddca3db2577b7f2bf1040972231279288847 (patch)
tree55aacddd1daaa8c89cbb14fc3f0a18a183dc72e6 /include/configs/MPC8572DS.h
parente4382acb1ff1c0686d86f4cac4f2e12f89c534cf (diff)
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powerpc/85xx: Fix NAND SPL support
We cause CCSRBAR to be relocated in the SPL phase of NAND boot which isn't expected and breaks things. Fixing the board config.h to NOT relocate CCSR during the CONFIG_NAND_SPL phase. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/MPC8572DS.h')
-rw-r--r--include/configs/MPC8572DS.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index ffee8fc..d7910e1 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -115,7 +115,7 @@
#define CONFIG_SYS_CCSRBAR 0xffe00000
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
-#if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_NAND_SPL)
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif