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authorKumar Gala <galak@kernel.crashing.org>2010-12-17 10:18:07 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:20 -0600
commit94f2bc486043365f253892342a3ab75371b1444a (patch)
treef25b7a7aa2aeb98705918be15b7a3698df88c5a2 /include/configs/MPC8569MDS.h
parent3f6f9d76415072571029b646a6aefc067a635bde (diff)
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powerpc/85xx: Rework MPC8569MDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8569MDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/MPC8569MDS.h')
-rw-r--r--include/configs/MPC8569MDS.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 177d5d5..814c175 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -345,6 +345,7 @@ extern unsigned long get_clock_freq(void);
* General PCI
* Memory Addresses are mapped 1-1. I/O is mapped from 0
*/
+#define CONFIG_SYS_PCIE1_NAME "Slot"
#define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000
#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
#define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000