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| author | Andy Fleming <afleming@freescale.com> | 2011-04-13 00:37:12 -0500 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2011-04-20 15:09:35 -0500 |
| commit | 865ff856403fb4bec6fe7f18101364384880068f (patch) | |
| tree | 10d0d27dd3ae1d484bf5920ce4d1be4fcb786ab1 /include/configs/MPC8568MDS.h | |
| parent | 063c12633d5ad74d52152d9c358e715475e17629 (diff) | |
| download | u-boot-imx-865ff856403fb4bec6fe7f18101364384880068f.zip u-boot-imx-865ff856403fb4bec6fe7f18101364384880068f.tar.gz u-boot-imx-865ff856403fb4bec6fe7f18101364384880068f.tar.bz2 | |
fsl: Change fsl_phy_enet_if to phy_interface_t
The fsl_phy_enet_if enum was, essentially, the phy_interface_t enum.
This meant that drivers which used fsl_phy_enet_if to deal with
PHY interfaces would have to convert between the two (or we would have
to have them mirror each other, and deal with the ensuing maintenance
headache). Instead, we switch all clients of fsl_phy_enet_if over to
phy_interface_t, which should become the standard, anyway.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Diffstat (limited to 'include/configs/MPC8568MDS.h')
| -rw-r--r-- | include/configs/MPC8568MDS.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 3674e49..6237b23 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -334,7 +334,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_UEC1_TX_CLK QE_CLK16 #define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH #define CONFIG_SYS_UEC1_PHY_ADDR 7 -#define CONFIG_SYS_UEC1_INTERFACE_TYPE RGMII_ID +#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID #define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000 #endif @@ -346,7 +346,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_UEC2_TX_CLK QE_CLK16 #define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH #define CONFIG_SYS_UEC2_PHY_ADDR 1 -#define CONFIG_SYS_UEC2_INTERFACE_TYPE RGMII_ID +#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID #define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000 #endif #endif /* CONFIG_QE */ |