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authorKim Phillips <kim.phillips@freescale.com>2009-01-21 18:38:51 -0600
committerKim Phillips <kim.phillips@freescale.com>2009-01-21 18:38:51 -0600
commitbe4880ebe4355e8782be4af4b337a1b98dffcbe3 (patch)
tree8b699181073305221b95f338a2d9107ab1bbfa3f /include/configs/MPC8568MDS.h
parent633639587e3596f0dbf5e6247dd3faf80b1d9063 (diff)
parent72d15e705bc3983884105cb7755c7ba80e74a0a5 (diff)
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Merge branch 'master' into next
Diffstat (limited to 'include/configs/MPC8568MDS.h')
-rw-r--r--include/configs/MPC8568MDS.h4
1 files changed, 1 insertions, 3 deletions
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index ab3e6d6..da1f454 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -61,7 +61,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_L2_CACHE /* toggle L2 cache */
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
/*
* Only possible on E500 Version 2 or newer cores.
@@ -92,7 +91,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
#define CONFIG_DDR_SPD
#define CONFIG_DDR_DLL /* possible DLL fix needed */
-#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
+#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
@@ -265,7 +264,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_BR5_PRELIM 0xf8010801
#define CONFIG_SYS_OR5_PRELIM 0xffff69f7
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */