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author | Ben Warren <biggerbadderben@gmail.com> | 2009-01-24 20:44:56 -0800 |
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committer | Ben Warren <biggerbadderben@gmail.com> | 2009-01-24 20:44:56 -0800 |
commit | ef29884b2708a6cce3b77f4ccaeea193d4e02c22 (patch) | |
tree | 2f6a28872ab9f5de9fec7ac878b8801f5f536eec /include/configs/MPC8560ADS.h | |
parent | 4cd8ed40615a7d741ef2f09ee53779ec6907b8a6 (diff) | |
parent | 8f86a3636ef88427f880610638e80991adc41896 (diff) | |
download | u-boot-imx-ef29884b2708a6cce3b77f4ccaeea193d4e02c22.zip u-boot-imx-ef29884b2708a6cce3b77f4ccaeea193d4e02c22.tar.gz u-boot-imx-ef29884b2708a6cce3b77f4ccaeea193d4e02c22.tar.bz2 |
Merge git://git.denx.de/u-boot into u-boot
Diffstat (limited to 'include/configs/MPC8560ADS.h')
-rw-r--r-- | include/configs/MPC8560ADS.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 2b5b2c1..3f78a6e 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -73,7 +73,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ @@ -301,18 +300,21 @@ #define CONFIG_SYS_I2C_OFFSET 0x3000 /* RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_BASE 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_PHYS CONFIG_SYS_RIO_MEM_BASE +#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000 /* base address */ +#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000 /* base address */ +#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000 #define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */ /* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 +#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 #define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 +#define CONFIG_SYS_PCI1_IO_BUS 0x00000000 #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ |