summaryrefslogtreecommitdiff
path: root/include/configs/MPC8548CDS.h
diff options
context:
space:
mode:
authorWolfgang Denk <wd@denx.de>2012-08-09 21:04:05 +0200
committerWolfgang Denk <wd@denx.de>2012-08-09 21:04:05 +0200
commit1d56f63dab2d9b1ea60601f5f3ae22d8664d8aa5 (patch)
tree249c74a50e495c32d6b8f387112f712430e38d22 /include/configs/MPC8548CDS.h
parentd764c5043d6d72e012f3e50092344ebd57a0c242 (diff)
parent5c5befda58e4a3f198a033e8a9952b2b309acc86 (diff)
downloadu-boot-imx-1d56f63dab2d9b1ea60601f5f3ae22d8664d8aa5.zip
u-boot-imx-1d56f63dab2d9b1ea60601f5f3ae22d8664d8aa5.tar.gz
u-boot-imx-1d56f63dab2d9b1ea60601f5f3ae22d8664d8aa5.tar.bz2
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs powerpc/mpc85xx: Ignore E bit for BSC9130/1 powerpc/sgmii: To support PHY link state auto detect in SGMII mode powerpc/85xx: improve definition of BR_PHYS_ADDR macro powerpc/p2041: configure the CPLD lane_mux according to RCW powerpc/ddr: fix fsl_ddr_get_dimm_params compile error powerpc/corenet: fix compile error when CONFIG_SYS_NO_FLASH is defined powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 for DDR over 4GB powerpc/p1022ds: fix DIU/LBC switching with NAND enabled powerpc/p1022ds: add support for SPI and SD boot Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs/MPC8548CDS.h')
-rw-r--r--include/configs/MPC8548CDS.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index e263994..95ce003 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -189,8 +189,7 @@ extern unsigned long get_clock_freq(void);
#endif
#define CONFIG_SYS_BR0_PRELIM \
- (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x800000)) \
- | BR_PS_16 | BR_V)
+ (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x800000) | BR_PS_16 | BR_V)
#define CONFIG_SYS_BR1_PRELIM \
(BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)