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| author | Dave Liu <daveliu@freescale.com> | 2008-10-28 17:53:38 +0800 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-12-03 22:44:48 -0600 |
| commit | 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 (patch) | |
| tree | 5f36c4042cbf9b782a025e446c56d2db8f182db4 /include/configs/MPC8548CDS.h | |
| parent | 2077e348c2a84901022ad95311b47b70361e6daa (diff) | |
| download | u-boot-imx-9b0ad1b1c7a15ff674978705c7c52264978dc5d8.zip u-boot-imx-9b0ad1b1c7a15ff674978705c7c52264978dc5d8.tar.gz u-boot-imx-9b0ad1b1c7a15ff674978705c7c52264978dc5d8.tar.bz2 | |
85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/MPC8548CDS.h')
| -rw-r--r-- | include/configs/MPC8548CDS.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 083afba..df26f10 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -100,7 +100,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ |