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| author | Kumar Gala <galak@kernel.crashing.org> | 2009-07-14 22:42:01 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-07-22 09:42:22 -0500 |
| commit | 6bb5b412291177e6edd42f9a80e5c5afe57a6a0f (patch) | |
| tree | e76ab269e5a3d402a738ad8b9716282bf2103a86 /include/configs/MPC8544DS.h | |
| parent | 9af9c6bdc16da53772c56b1a79c2c91701fe94e6 (diff) | |
| download | u-boot-imx-6bb5b412291177e6edd42f9a80e5c5afe57a6a0f.zip u-boot-imx-6bb5b412291177e6edd42f9a80e5c5afe57a6a0f.tar.gz u-boot-imx-6bb5b412291177e6edd42f9a80e5c5afe57a6a0f.tar.bz2 | |
85xx: Report which "bank" of NOR flash we are booting from on FSL boards
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".
The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/MPC8544DS.h')
| -rw-r--r-- | include/configs/MPC8544DS.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 8d5cfa1..2efeb72 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -192,6 +192,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */ #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */ #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */ +#define PIXIS_VBOOT_FMAP 0x80 /* VBOOT - CFG_FLASHMAP */ +#define PIXIS_VBOOT_FBANK 0x40 /* VBOOT - CFG_FLASHBANK */ #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */ #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ |