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authorNobuhiro Iwamatsu <iwamatsu@nigauri.org>2007-09-23 01:29:43 +0900
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2007-09-23 01:29:43 +0900
commitb8685affe614ccf5f4ec66252b30e2e524d18948 (patch)
tree05bc55b8a4a0451e6500f1f52651d81c0f48f012 /include/configs/MPC8540EVAL.h
parent69df3c4da0c93017cceb25a366e794570bd0ed98 (diff)
parent66dcad3a9a53e0766d90e0084123bd8529522fb0 (diff)
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Merge git://www.denx.de/git/u-boot
Conflicts: CREDITS
Diffstat (limited to 'include/configs/MPC8540EVAL.h')
-rw-r--r--include/configs/MPC8540EVAL.h60
1 files changed, 37 insertions, 23 deletions
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 418a3a3..e376c11 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -212,11 +212,14 @@
#elif defined(CONFIG_TSEC_ENET)
#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC1 1
+#define CONFIG_HAS_ETH0
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_HAS_ETH1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define CONFIG_MPC85XX_FEC 1
+#define CONFIG_HAS_ETH2
#define CONFIG_MPC85XX_FEC_NAME "FEC"
#define TSEC1_PHY_ADDR 7
#define TSEC2_PHY_ADDR 4
@@ -224,6 +227,10 @@
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
#define FEC_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
+#define FEC_FLAGS 0
+
/* Options are: TSEC[0-1], FEC */
#define CONFIG_ETHPRIME "TSEC0"
@@ -259,26 +266,33 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH)
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING \
- | CFG_CMD_PCI | CFG_CMD_I2C ) & \
- ~(CFG_CMD_ENV | CFG_CMD_LOADS ))
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING \
- | CFG_CMD_I2C ) & \
- ~(CFG_CMD_ENV | CFG_CMD_LOADS ))
-#endif
-#else
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI \
- | CFG_CMD_PING | CFG_CMD_I2C )
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_I2C )
+ #define CONFIG_CMD_PCI
#endif
+
+#if defined(CFG_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
#endif
-#include <cmd_confdefs.h>
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -288,7 +302,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "MPC8540EVAL=> "/* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -308,7 +322,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -320,7 +334,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif