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| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-08-19 02:04:56 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.denx.de> | 2006-08-19 02:04:56 +0200 |
| commit | 4a39616da41840bbc5b4c3f69df9861c2e6a8425 (patch) | |
| tree | b1f3182b68f5115de3f37a2f4bed74971c2786d9 /include/configs/MPC8540ADS.h | |
| parent | 5196a7a03bc436435787e1ad7044af94d93a5448 (diff) | |
| parent | 86c8e17f25e972a7e272950a0735fad84e082b88 (diff) | |
| download | u-boot-imx-4a39616da41840bbc5b4c3f69df9861c2e6a8425.zip u-boot-imx-4a39616da41840bbc5b4c3f69df9861c2e6a8425.tar.gz u-boot-imx-4a39616da41840bbc5b4c3f69df9861c2e6a8425.tar.bz2 | |
Merge with http://opensource.freescale.com/pub/scm/u-boot-85xx.git#for_wd
Diffstat (limited to 'include/configs/MPC8540ADS.h')
| -rw-r--r-- | include/configs/MPC8540ADS.h | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 131c832..8e4d2c9 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -68,6 +68,10 @@ * The board, however, can run at 66MHz. In any event, this value * must match the settings of some switches. Details can be found * in the README.mpc85xxads. + * + * XXX -- Can't we run at 66 MHz, anyway? PCI should drop to + * 33MHz to accommodate, based on a PCI pin. + * Note that PCI-X won't work at 33MHz. */ #ifndef CONFIG_SYS_CLK_FREQ @@ -293,6 +297,21 @@ #define CFG_PROMPT_HUSH_PS2 "> " #endif +/* pass open firmware flat tree */ +#define CONFIG_OF_FLAT_TREE 1 +#define CONFIG_OF_BOARD_SETUP 1 + +/* maximum size of the flat tree (8K) */ +#define OF_FLAT_TREE_MAX_SIZE 8192 + +#define OF_CPU "PowerPC,8540@0" +#define OF_SOC "soc8540@e0000000" +#define OF_TBCLK (bd->bi_busfreq / 8) +#define OF_STDOUT_PATH "/soc8540@e0000000/serial@4500" + +#define CFG_64BIT_VSPRINTF 1 +#define CFG_64BIT_STRTOUL 1 + /* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ @@ -312,9 +331,10 @@ #define CFG_PCI1_MEM_BASE 0x80000000 #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE #define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CFG_PCI1_IO_BASE 0xe2000000 -#define CFG_PCI1_IO_PHYS CFG_PCI1_IO_BASE -#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */ + +#define CFG_PCI1_IO_BASE 0x0 +#define CFG_PCI1_IO_PHYS 0xe2000000 +#define CFG_PCI1_IO_SIZE 0x100000 /* 1M */ #if defined(CONFIG_PCI) |