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authorKim Phillips <kim.phillips@freescale.com>2009-01-21 18:38:51 -0600
committerKim Phillips <kim.phillips@freescale.com>2009-01-21 18:38:51 -0600
commitbe4880ebe4355e8782be4af4b337a1b98dffcbe3 (patch)
tree8b699181073305221b95f338a2d9107ab1bbfa3f /include/configs/MPC8536DS.h
parent633639587e3596f0dbf5e6247dd3faf80b1d9063 (diff)
parent72d15e705bc3983884105cb7755c7ba80e74a0a5 (diff)
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Merge branch 'master' into next
Diffstat (limited to 'include/configs/MPC8536DS.h')
-rw-r--r--include/configs/MPC8536DS.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index fff888ab..532c3df 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -70,7 +70,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
*/
#define CONFIG_L2_CACHE /* toggle L2 cache */
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
#define CONFIG_ENABLE_36BIT_PHYS 1
@@ -99,7 +98,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#define CONFIG_DDR_SPD
#undef CONFIG_DDR_DLL
-#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
+#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
@@ -231,8 +230,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
#define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0
-/* define to use L1 as initial stack */
-#define CONFIG_L1_INIT_RAM
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
#define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */