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author | Joe Hershberger <joe.hershberger@ni.com> | 2011-10-11 23:57:29 -0500 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:55 -0500 |
commit | 2fef402097866b4172d7a966a72397a5ccba5b10 (patch) | |
tree | 14a4deb28cb562df7e19eec7f654dcbde38f8d20 /include/configs/MPC8360ERDK.h | |
parent | 72cd4087c9644812b0fff9440e88e986d259bf41 (diff) | |
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mpc83xx: Cleanup usage of DDR constants
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/MPC8360ERDK.h')
-rw-r--r-- | include/configs/MPC8360ERDK.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index 04ea738..bc574a6 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -96,7 +96,10 @@ /* * DDRCDR - DDR Control Driver Register */ -#define CONFIG_SYS_DDRCDR_VALUE 0x80080001 +#define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN \ + | DDRCDR_ODT \ + | DDRCDR_Q_DRN) + /* 0x80080001 */ #undef CONFIG_SPD_EEPROM /* Do not use SPD EEPROM for DDR setup */ @@ -105,11 +108,11 @@ */ #define CONFIG_DDR_II #define CONFIG_SYS_DDR_SIZE 256 /* MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f #define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ | CSCONFIG_ROW_BIT_13 \ | CSCONFIG_COL_BIT_10 \ - | CSCONFIG_ODT_WR_ACS) + | CSCONFIG_ODT_WR_ONLY_CURRENT) #define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SDRAM_TYPE_DDR2 \ | SDRAM_CFG_ECC_EN) #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 |