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| author | Timur Tabi <timur@freescale.com> | 2009-06-19 14:10:52 -0500 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-07-11 00:19:16 +0200 |
| commit | 890d242facc4079ed21e979ced2e8c6d6974f6d3 (patch) | |
| tree | 51451c530840269e3e7a53b2f740eaf943e9dfe5 /include/configs/MPC8349ITX.h | |
| parent | 7bd49ad12cc36a4de6995ddabbc65ffa1aa1933d (diff) | |
| download | u-boot-imx-890d242facc4079ed21e979ced2e8c6d6974f6d3.zip u-boot-imx-890d242facc4079ed21e979ced2e8c6d6974f6d3.tar.gz u-boot-imx-890d242facc4079ed21e979ced2e8c6d6974f6d3.tar.bz2 | |
remove _IO_BASE and KSEG1ADDR from board configuration files
The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet
driver, but the code that used that macro was removed over a year
ago, so board configuration files no longer need to define it.
The _IO_BASE macro is also automatically defined to 0 if it isn't
already set, so there's no need to define that macro either in the
board configuration files.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/MPC8349ITX.h')
| -rw-r--r-- | include/configs/MPC8349ITX.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index f2e574b..d4d3256 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -360,16 +360,9 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_PCI2_IO_SIZE 0x01000000 /* 16M */ #endif -#define _IO_BASE 0x00000000 /* points to PCI I/O space */ - #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ -#ifdef CONFIG_RTL8139 -/* This macro is used by RTL8139 but not defined in PPC architecture */ -#define KSEG1ADDR(x) (x) -#endif - #ifndef CONFIG_PCI_PNP #define PCI_ENET0_IOADDR 0x00000000 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI2_MEM_BASE |