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| author | Joe Hershberger <joe.hershberger@ni.com> | 2011-10-11 23:57:31 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:56 -0500 |
| commit | 2e651b248348e156d193e46f7a5b827d74af90d6 (patch) | |
| tree | 76515fcf8008dbaefcdfdb6afffdb79376a82057 /include/configs/MPC8349ITX.h | |
| parent | 7d6a098219f8473ca4653cce5f7a49672b967f36 (diff) | |
| download | u-boot-imx-2e651b248348e156d193e46f7a5b827d74af90d6.zip u-boot-imx-2e651b248348e156d193e46f7a5b827d74af90d6.tar.gz u-boot-imx-2e651b248348e156d193e46f7a5b827d74af90d6.tar.bz2 | |
mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code
Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring
Cleanup the setting of the csnbds to respect the setting of
CONFIG_SYS_DDR_SDRAM_BASE
Use __ilog2 instead of writing the code to compute it
Disable unused CS configs
Ensure ddrlaw.bar is configured
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/MPC8349ITX.h')
| -rw-r--r-- | include/configs/MPC8349ITX.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index a2ceba7..04f2da9 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -206,7 +206,7 @@ /* No SPD? Then manually set up DDR parameters */ #ifndef CONFIG_SPD_EEPROM #define CONFIG_SYS_DDR_SIZE 256 /* Mb */ - #define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN \ + #define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ | CSCONFIG_ROW_BIT_13 \ | CSCONFIG_COL_BIT_10) |