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authorKim Phillips <kim.phillips@freescale.com>2006-11-01 00:10:40 -0600
committerKim Phillips <kim.phillips@freescale.com>2006-11-03 19:42:22 -0600
commitbf0b542d6773a5a1cbce77691f009b06d9aeb57d (patch)
tree9b17b6026eb428d50f38eda7401e400baec2999b /include/configs/MPC8349EMDS.h
parent48041365b3420589ad464ebc7752e0053538b729 (diff)
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mpc83xx: add OF_FLAT_TREE bits to 83xx boards
add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and STDOUT_PATH configuration bits to mpc8349emds, mpc8349itx, and mpc8360emds board code. redo environment to use bootm with the fdtaddr for booting ARCH=powerpc kernels by default, and provide default fdtaddr values.
Diffstat (limited to 'include/configs/MPC8349EMDS.h')
-rw-r--r--include/configs/MPC8349EMDS.h51
1 files changed, 46 insertions, 5 deletions
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 4d5ad57..e68c41a 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -35,6 +35,7 @@
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 Family */
+#define CONFIG_MPC83XX 1 /* MPC83XX family */
#define CONFIG_MPC834X 1 /* MPC834X family */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */
@@ -59,6 +60,17 @@
#endif
#endif
+#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK))
+#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */
+#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */
+#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */
+#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */
+#define CFG_SCCR_VAL ( CFG_SCCR_INIT \
+ | CFG_SCCR_TSEC1CM \
+ | CFG_SCCR_TSEC2CM \
+ | CFG_SCCR_ENCCM \
+ | CFG_SCCR_USBCM )
+
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
#define CFG_IMMRBAR 0xE0000000
@@ -308,6 +320,18 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE 8192
+
+#define OF_CPU "PowerPC,8349@0"
+#define OF_SOC "soc8349@e0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc8349@e0000000/serial@4500"
+
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
@@ -668,11 +692,11 @@
#define CONFIG_ETH1ADDR 00:E0:0C:00:7E:21
#endif
-#define CONFIG_IPADDR 192.168.205.5
+#define CONFIG_IPADDR 192.168.1.253
#define CONFIG_HOSTNAME mpc8349emds
-#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx
-#define CONFIG_BOOTFILE /tftpboot/tqm83xx/uImage
+#define CONFIG_ROOTPATH /nfsroot/rootfs
+#define CONFIG_BOOTFILE uImage
#define CONFIG_SERVERIP 192.168.1.1
#define CONFIG_GATEWAYIP 192.168.1.1
@@ -705,14 +729,31 @@
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
"bootm\0" \
- "rootpath=/opt/eldk/ppc_6xx\0" \
- "bootfile=/tftpboot/mpc8349emds/uImage\0" \
"load=tftp 100000 /tftpboot/mpc8349emds/u-boot.bin\0" \
"update=protect off fe000000 fe03ffff; " \
"era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0" \
"upd=run load;run update\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=mpc8349emds.dtb\0" \
""
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
#define CONFIG_BOOTCOMMAND "run flash_self"
#endif /* __CONFIG_H */