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| author | Joe Hershberger <joe.hershberger@ni.com> | 2011-10-11 23:57:28 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:55 -0500 |
| commit | 72cd4087c9644812b0fff9440e88e986d259bf41 (patch) | |
| tree | 1eda3ef995273cca7b4cf11c978895fd8ac4f3f4 /include/configs/MPC8349EMDS.h | |
| parent | c7357a2b90aff93bbc3b8e71867b2e86eb0b73da (diff) | |
| download | u-boot-imx-72cd4087c9644812b0fff9440e88e986d259bf41.zip u-boot-imx-72cd4087c9644812b0fff9440e88e986d259bf41.tar.gz u-boot-imx-72cd4087c9644812b0fff9440e88e986d259bf41.tar.bz2 | |
mpc83xx: Cleanup usage of BAT constants
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/MPC8349EMDS.h')
| -rw-r--r-- | include/configs/MPC8349EMDS.h | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index e3052f0..0c0e904 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -645,7 +645,7 @@ /* DDR @ 0x00000000 */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ | BATU_BL_256M \ @@ -655,14 +655,14 @@ /* PCI @ 0x80000000 */ #ifdef CONFIG_PCI #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \ | BATU_BL_256M \ | BATU_VS \ | BATU_VP) #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \ @@ -678,14 +678,14 @@ #ifdef CONFIG_MPC83XX_PCI2 #define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE \ | BATU_BL_256M \ | BATU_VS \ | BATU_VP) #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE \ @@ -701,7 +701,7 @@ /* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */ #define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \ - | BATL_PP_10 \ + | BATL_PP_RW \ | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \ @@ -711,10 +711,9 @@ /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ #define CONFIG_SYS_IBAT6L (0xF0000000 \ - | BATL_PP_10 \ - | BATL_MEMCOHERENCE |\ - \ - BATL_GUARDEDSTORAGE) + | BATL_PP_RW \ + | BATL_MEMCOHERENCE \ + | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_IBAT6U (0xF0000000 \ | BATU_BL_256M \ | BATU_VS \ |