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| author | Marian Balakowicz <m8@semihalf.com> | 2006-03-16 15:19:35 +0100 |
|---|---|---|
| committer | Marian Balakowicz <m8@semihalf.com> | 2006-03-16 15:19:35 +0100 |
| commit | d326f4a242971928ef5a6efb411a604b0478ef1c (patch) | |
| tree | b26cef39c5b16de02856182cebee9052a24bfadc /include/configs/MPC8349EMDS.h | |
| parent | 97f98001a325558020128381e1bebf893c811617 (diff) | |
| download | u-boot-imx-d326f4a242971928ef5a6efb411a604b0478ef1c.zip u-boot-imx-d326f4a242971928ef5a6efb411a604b0478ef1c.tar.gz u-boot-imx-d326f4a242971928ef5a6efb411a604b0478ef1c.tar.bz2 | |
Add command for handling DDR ECC registers on MPC8349EE MDS board.
Diffstat (limited to 'include/configs/MPC8349EMDS.h')
| -rw-r--r-- | include/configs/MPC8349EMDS.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index ef2eced..c2bd0f5 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -70,6 +70,7 @@ * DDR Setup */ #define CONFIG_DDR_ECC /* only for ECC DDR module */ +#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */ #define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/ #define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/ |