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| author | Scott Wood <scottwood@freescale.com> | 2010-11-24 13:28:40 +0000 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-11-27 23:35:08 +0100 |
| commit | f1c574d4006d81301792e70fafc31ff39259e793 (patch) | |
| tree | d3f6866e50cf5f51b9e583d07eedbb5cf0735789 /include/configs/MPC8313ERDB.h | |
| parent | c56f84ca9c86d7b9ac4a79ce6c9569aa8b851833 (diff) | |
| download | u-boot-imx-f1c574d4006d81301792e70fafc31ff39259e793.zip u-boot-imx-f1c574d4006d81301792e70fafc31ff39259e793.tar.gz u-boot-imx-f1c574d4006d81301792e70fafc31ff39259e793.tar.bz2 | |
83xx: Fix NAND_SPL link address
Apply the same fix for 83xx as was done for 85xx in commit
96196a1f7546904563994d2d041804a816d7c139.
Without this, NAND SPLs are built with the text base intended for the main
image, resulting in a broken, very large u-boot-nand.bin.
The block of defines for NAND boot is moved closer to where
CONFIG_SYS_TEXT_BASE is defined. We can't directly use
CONFIG_SYS_NAND_U_BOOT_DST in the definition of CONFIG_SYS_TEXT_BASE because
autoconf.mk will include the literal text "CONFIG_SYS_NAND_U_BOOT_DST",
but at least keep them close and point out that they're supposed to be
the same.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include/configs/MPC8313ERDB.h')
| -rw-r--r-- | include/configs/MPC8313ERDB.h | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 1201133..92c54d0 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -35,10 +35,29 @@ #define CONFIG_MPC8313 1 #define CONFIG_MPC8313ERDB 1 +#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000 +#define CONFIG_SYS_NAND_U_BOOT_START 0x00100100 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 16384 +#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) + +#ifdef CONFIG_NAND_U_BOOT +#define CONFIG_SYS_TEXT_BASE 0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */ +#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 +#ifdef CONFIG_NAND_SPL +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ +#endif /* CONFIG_NAND_SPL */ +#endif /* CONFIG_NAND_U_BOOT */ + #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFE000000 #endif +#ifndef CONFIG_SYS_MONITOR_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#endif + #define CONFIG_PCI #define CONFIG_FSL_ELBC 1 @@ -200,8 +219,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && !defined(CONFIG_NAND_SPL) #define CONFIG_SYS_RAMBOOT #endif @@ -248,12 +265,6 @@ #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384 -#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10) -#define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000 -#define CONFIG_SYS_NAND_U_BOOT_START 0x00100100 -#define CONFIG_SYS_NAND_U_BOOT_OFFS 16384 -#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) #define CONFIG_SYS_NAND_BR_PRELIM ( CONFIG_SYS_NAND_BASE \ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ |