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| author | wdenk <wdenk> | 2003-06-27 21:31:46 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2003-06-27 21:31:46 +0000 |
| commit | 8bde7f776c77b343aca29b8c7b58464d915ac245 (patch) | |
| tree | 20f1fd99975215e7c658454a15cdb4ed4694e2d4 /include/configs/MHPC.h | |
| parent | 993cad9364c6b87ae429d1ed1130d8153f6f027e (diff) | |
| download | u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.zip u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.gz u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.bz2 | |
* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
Diffstat (limited to 'include/configs/MHPC.h')
| -rw-r--r-- | include/configs/MHPC.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/configs/MHPC.h b/include/configs/MHPC.h index 78caafd..e36341f 100644 --- a/include/configs/MHPC.h +++ b/include/configs/MHPC.h @@ -116,12 +116,12 @@ #define CONFIG_BR0_WORKAROUND 1 #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_DATE | \ - CFG_CMD_EEPROM | \ - CFG_CMD_ELF | \ - CFG_CMD_I2C | \ - CFG_CMD_JFFS2 | \ - CFG_CMD_REGINFO ) + CFG_CMD_DATE | \ + CFG_CMD_EEPROM | \ + CFG_CMD_ELF | \ + CFG_CMD_I2C | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_REGINFO ) #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) @@ -225,7 +225,7 @@ SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) #else #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ - SYPCR_SWP) + SYPCR_SWP) #endif /*----------------------------------------------------------------------- @@ -265,7 +265,7 @@ #define MPC8XX_XIN 5000000L /* ref clk */ #define MPC8XX_FACT (MPC8XX_SPEED/MPC8XX_XIN) #define CFG_PLPRCR (((MPC8XX_FACT-1) << PLPRCR_MF_SHIFT) | \ - PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST) + PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST) /*----------------------------------------------------------------------- * SCCR - System Clock and reset Control Register 15-27 |