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author | Minkyu Kang <mk7.kang@samsung.com> | 2010-11-16 09:55:11 +0900 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-11-16 09:55:11 +0900 |
commit | 1032d97496f6d534bf0030a5779ff1cb38cc9ebf (patch) | |
tree | 3713c814a7453024eceb097c67532072950e2f2e /include/configs/M5475EVB.h | |
parent | 37a3bda0c9c8a2ffbf7e2a9e121177a3385a0626 (diff) | |
parent | 227b72515546fca535dbd3274f6d875d97f494fe (diff) | |
download | u-boot-imx-1032d97496f6d534bf0030a5779ff1cb38cc9ebf.zip u-boot-imx-1032d97496f6d534bf0030a5779ff1cb38cc9ebf.tar.gz u-boot-imx-1032d97496f6d534bf0030a5779ff1cb38cc9ebf.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'include/configs/M5475EVB.h')
-rw-r--r-- | include/configs/M5475EVB.h | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index d007766..5f6eb55 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -210,13 +210,12 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0xF2000000 -#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x21 -#define CONFIG_SYS_INIT_RAM1_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_END) +#define CONFIG_SYS_INIT_RAM1_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) #define CONFIG_SYS_INIT_RAM1_END 0x1000 /* End of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM1_CTRL 0x21 -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10) +#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- @@ -287,9 +286,9 @@ #define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 8) + CONFIG_SYS_INIT_RAM_SIZE - 8) #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 4) + CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA + \ CF_CACR_IDCM) #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) |