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| author | Wolfgang Denk <wd@denx.de> | 2010-11-12 22:24:06 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-11-12 22:24:06 +0100 |
| commit | d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0 (patch) | |
| tree | 07dd5889d73f4b66ad608815adcf6f2f953d9501 /include/configs/M54455EVB.h | |
| parent | 66fca016057b1c6b697552cc7220ebada9d4f82d (diff) | |
| parent | 0c0892be0d93a5a892b93739c5eb3bf692fed4ff (diff) | |
| download | u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.zip u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.tar.gz u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.tar.bz2 | |
Merge branch 'master' of /home/wd/git/u-boot/master
Diffstat (limited to 'include/configs/M54455EVB.h')
| -rw-r--r-- | include/configs/M54455EVB.h | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 1cdc373..86faa3d 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -279,12 +279,11 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32) +#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - 32) +#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -409,9 +408,9 @@ #define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 8) + CONFIG_SYS_INIT_RAM_SIZE - 8) #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 4) + CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) #define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \ |